STM32WB55CC datasheet(148/165 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32WB55xx

148/165

DS11929 Rev 3

Table 92. Quad-SPI characteristics in DDR mode(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

FCK

1/t(CK)

Quad-SPI clock

frequency

1.65 < VDD < 3.6 V, CLOAD = 20 pF

Voltage Range 1

MHz

2.0 < VDD < 3.6 V, CLOAD = 20 pF

Voltage Range 1

1.65 < VDD < 3.6 V, CLOAD = 15 pF

Voltage Range 1

1.65 < VDD < 3.6 V CLOAD = 20 pF

Voltage Range 2

tw(CKH) Quad-SPI clock

high and low time

fAHBCLK = 48 MHz, presc=0

t(CK)/2

t(CK)/2 + 1

tw(CKL)

t(CK)/2 - 1

t(CK)/2

tsr(IN)

Data input setup

time on rising edge

Voltage Range 1

2.5

Voltage Range 2

3.5

tsf(IN)

Data input setup

time on falling edge

Voltage Range 1

2.5

Voltage Range 2

1.5

thr(IN)

Data input hold

time on rising edge

Voltage Range 1

5.5

Voltage Range 2

6.5

thf(IN)

Data input hold

time on falling edge

Voltage Range 1

Voltage Range 2

tvr(OUT)

Data output valid

time on rising edge

Voltage Range 1

DHHC=0

45.5

DHHC=1

t(CK)/2 + 1 t(CK)/2 + 1.5

Voltage Range 2

4.5

tvf(OUT)

Data output valid

time on falling edge

Voltage Range 1

DHHC=0

DHHC=1

t(CK)/2 + 1

t(CK)/2 + 2

Voltage Range 2

7.5

thr(OUT)

Data output hold

time on rising edge

Voltage Range 1

DHHC=0

DHHC=1 t(CK)/2 + 0.5

Voltage Range 2

3.5

thf(OUT)

Data output hold

time on falling edge

Voltage Range 1

DHHC=0

DHHC=1 t(CK)/2 + 0.5

Voltage Range 2

1. Guaranteed by characterization results.

STM32WB55CC Datasheet(PDF) 148 Page - STMicroelectronics

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