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HD64F2145 Datasheet(PDF) 307 Page - Renesas Technology Corp |
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HD64F2145 Datasheet(HTML) 307 Page - Renesas Technology Corp |
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307 / 829 page ![]() Rev. 2.0, 08/02, page 267 of 788 Section 12 8-Bit Timer (TMR) This LSI has an on-chip 8-bit timer module (TMR_0 and TMR_1) with two channels operating on the basis of an 8-bit counter. The 8-bit timer module can count external events, and can also be used as a multifunction timer in a variety of applications, such as generation of counter reset, interrupt requests, and pulse output with an arbitrary duty cycle using a compare-match signal with two registers. This LSI also has a similar on-chip 8-bit timer module (TMR_Y and TMR_X) with two channels, which can be used through connection to the timer connection. 12.1 Features • Selection of clock sources TMR_0, TMR_1: The counter input clock can be selected from six internal clocks and an external clock TMR_Y, TMR_X: The counter input clock can be selected from three internal clocks and an external clock • Selection of three ways to clear the counters The counters can be cleared on compare-match A or compare-match B, or by an external reset signal. • Timer output controlled by two compare-match signals The timer output signal in each channel is controlled by two independent compare-match signals, enabling the timer to be used for various applications, such as the generation of pulse output or PWM output with an arbitrary duty cycle. (The TMR_Y does not have a timer output pin.) • Cascading of TMR_0 and TMR_1 (TMR_Y and TMR_X cannot be cascaded.) Operation as a 16-bit timer can be performed using TMR_0 as the upper half and TMR_1 as the lower half (16-bit count mode). TMR_1 can be used to count TMR_0 compare-match occurrences (compare-match count mode). • Multiple interrupt sources for each channel TMR_0, TMR_1, and TMR_Y: Three types of interrupts: Compare-match A, compare- match B, and overflow TMR_X: Input capture TIMH261A_010020020700 |
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