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SAF-C161PI Datasheet(PDF) 65 Page - Infineon Technologies AG |
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SAF-C161PI Datasheet(HTML) 65 Page - Infineon Technologies AG |
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65 / 400 page  &3, 7KH &HQWUDO 3URFHVVLQJ 8QLW &38 User’s Manual 4-17 1999-08 The Processor Status Word PSW This bit-addressable register reflects the current state of the microcontroller. Two groups of bits represent the current ALU status, and the current CPU interrupt status. A separate bit (USR0) within register PSW is provided as a general purpose user flag. ALU Status (N, C, V, Z, E, MULIP) The condition flags (N, C, V, Z, E) within the PSW indicate the ALU status due to the last recently performed ALU operation. They are set by most of the instructions due to specific rules, which depend on the ALU or data movement operation performed by an instruction. PSW Program Status Word SFR (FF10 H/88H) Reset value: 0000 H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ILVL IEN - - - - USR0 MUL IP EZ V C N rwh rw - - - - rw rwh rwh rwh rwh rwh rwh Bit Function N Negative Result Set, when the result of an ALU operation is negative. CCarry Flag Set, when the result of an ALU operation produces a carry bit. V Overflow Result Set, when the result of an ALU operation produces an overflow. Z Zero Flag Set, when the result of an ALU operation is zero. E End of Table Flag Set, when the source operand of an instruction is 8000 H or 80H. MULIP Multiplication/Division In Progress 0: There is no multiplication/division in progress. 1: A multiplication/division has been interrupted. USR0 User General Purpose Flag May be used by the application software. ILVL, IEN Interrupt and EBC Control Fields Define the response to interrupt requests. (Described in section “Interrupt and Trap Functions”) |
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