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SAF-C161PI Datasheet(PDF) 76 Page - Infineon Technologies AG |
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SAF-C161PI Datasheet(HTML) 76 Page - Infineon Technologies AG |
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76 / 400 page  &3, 7KH &HQWUDO 3URFHVVLQJ 8QLW &38 User’s Manual 4-28 1999-08 The Stack Pointer SP This non-bit addressable register is used to point to the top of the internal system stack (TOS). The SP register is pre-decremented whenever data is to be pushed onto the stack, and it is post-incremented whenever data is to be popped from the stack. Thus, the system stack grows from higher toward lower memory locations. Since the least significant bit of register SP is tied to ’0’ and bits 15 through 12 are tied to ’1’ by hardware, the SP register can only contain values from F000 H to FFFEH. This allows to access a physical stack within the internal RAM of the C161PI. A virtual stack (usually bigger) can be realized via software. This mechanism is supported by registers STKOV and STKUN (see respective descriptions below). The SP register can be updated via any instruction, which is capable of modifying an SFR. Note: Due to the internal instruction pipeline, a POP or RETURN instruction must not immediately follow an instruction updating the SP register. SP Stack Pointer Register SFR (FE12 H/09H) Reset value: FC00 H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 11 11 sp 0 r r r r rwh r Bit Function sp Modifiable portion of register SP Specifies the top of the internal system stack. |
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