TMS320F28375DPZP datasheet(190/226 Pages) TI

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9.6.3 Viterbi, Complex Math, and CRC Unit II (VCU-II)

The VCU-II is the second-generation Viterbi, Complex Math, and CRC extension to the C28x CPU. The VCU-II

extends the capabilities of the C28x CPU by adding registers and instructions to accelerate the performance of

FFTs and communications-based algorithms. The C28x+VCU-II supports the following algorithm types:

• Viterbi Decoding

Viterbi decoding is commonly used in baseband communications applications. The Viterbi decode algorithm

consists of three main parts: branch metric calculations, compare-select (Viterbi butterfly), and a traceback

operation. Table 9-12 shows a summary of the VCU performance for each of these operations.

Table 9-12. Viterbi Decode Performance

VITERBI OPERATION

VCU CYCLES

Branch Metric Calculation (code rate = 1/2)

Branch Metric Calculation (code rate = 1/3)

Viterbi Butterfly (add-compare-select)

2(1)

Traceback per Stage

3(2)

(1)

C28x CPU takes 15 cycles per butterfly.

(2)

C28x CPU takes 22 cycles per stage.

• Cyclic Redundancy Check

Cyclic redundancy check (CRC) algorithms provide a straightforward method for verifying data integrity over

large data blocks, communication packets, or code sections. The C28x+VCU can perform 8-bit, 16-bit, 24-bit,

and 32-bit CRCs. For example, the VCU can compute the CRC for a block length of 10 bytes in 10 cycles. A

CRC result register contains the current CRC, which is updated whenever a CRC instruction is executed.

• Complex Math

Complex math is used in many applications, a few of which are:

– Fast Fourier Transform (FFT)

The complex FFT is used in spread spectrum communications, as well as in many signal processing

algorithms.

– Complex filters

Complex filters improve data reliability, transmission distance, and power efficiency. The C28x+VCU can

perform a complex I and Q multiply with coefficients (four multiplies) in a single cycle. In addition, the C28x

+VCU can read/write the real and imaginary parts of 16-bit complex data to memory in a single cycle.

Table 9-13 shows a summary of the VCU operations enabled by the VCU.

TMS320F28379D, TMS320F28379D-Q1, TMS320F28378D, TMS320F28377D

TMS320F28377D-Q1, TMS320F28376D, TMS320F28375D, TMS320F28374D

SPRS880O – DECEMBER 2013 – REVISED FEBRUARY 2021

www.ti.com

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TMS320F28375DPZP Datasheet(PDF) 190 Page - Texas Instruments

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