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MCP48CMB21 Datasheet(PDF) 2 Page - Microchip Technology |
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MCP48CMB21 Datasheet(HTML) 2 Page - Microchip Technology |
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2 / 106 page ![]() MCP48CXBXX DS20006160A-page 2 2019 Microchip Technology Inc. General Description The MCP48CXBXX are single and dual-channel 8-bit, 10-bit, and 12-bit buffered voltage output Digital-to-Analog Converters (DAC), with volatile or MTP memory and an SPI serial interface. The MTP memory can be written by the user up to 32 times, for each specific register. It requires a high-voltage level on the HVC pin, typically 7.5V, in order to successfully program the desired memory location. The nonvolatile memory includes power-up output values, device configuration registers and general purpose memory. The VREF pin, the device VDD or the internal band gap voltage can be selected as the DAC’s reference voltage. When VDD is selected, VDD is internally connected to the DAC reference circuit. When the VREF pin is used with an external voltage reference, the user can select between a gain of 1 or 2 and can have the reference buffer enabled or disabled. When the gain is 2, the VREF pin voltage should be limited to a maximum of VDD/2. These devices have a four-wire SPI-compatible serial interface with speeds up to 50 MHz for write and 25 MHz for read operations. Applications • Set Point or Offset Trimming • Sensor Calibration • Low-Power Portable Instrumentation • PC Peripherals • Data Acquisition Systems MCP48CVBX1 Block Diagram (Single-Channel Output) VDD VSS Memory SCK SDI VREF1:VREF0 Note 1: Available only on specific packages. VOUT0 VDD PD1:PD0 VREF1:VREF0 OPAMP PD1:PD0 and VREF1:VREF0 DAC0 VREF POWER-DOWN GAIN STATUS DAC0 VREF POWER-DOWN GAIN WIPERLOCK™ VOLATILE (4 x 16) NONVOLATILE (13 x 16) Power-up/Brown-out Control SPI Serial Interface Module and Control Logic (WiperLock™ Technology) Band gap 1.214V VDD GAIN VIHH LAT0 VBG LAT/HVC VREF0 SDO CS |
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