MCP48CMB21 datasheet(50/106 Pages) MICROCHIP

50 / 106 page

MCP48CXBXX

DS20006160A-page 50

 2019 Microchip Technology Inc.

Control register. Each DAC has two bits to control the

Power-Down state of the DAC. This register is for the

volatile memory locations and the nonvolatile memory

locations. The width of this register is 2 times the

number of DACs for the device.

POWER-DOWN CONTROL REGISTERS (09h/19h)

(VOLATILE/NONVOLATILE)

U-0

R/W-n R/W-n R/W-n R/W-n

Single

——

———

——

———

——

—(1)

—(1) PD0B PD0A

Dual

—

PD1B PD1A PD0B PD0A

bit 15

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

= Single-channel device

= Dual-channel device

Single

Dual

bit 15-2

bit 15-4

Unimplemented: Read as ‘0’

bit 1-0

bit 3-0

PDxB-PDxA: DAC Power-Down Control bits(2)

11 =Powered-Down - VOUT is open circuit

10 =Powered-Down - VOUT is loaded with a 100 k resistor to ground

01 =Powered-Down - VOUT is loaded with a 1 k resistor to ground

00 =Normal Operation (Not powered-down)

Note 1:

Unimplemented bit, read as ‘0’.

See Table 5-5 for more details.

MCP48CMB21 Datasheet(PDF) 50 Page - Microchip Technology

MCP48CMB21 Datasheet(HTML) 50 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL