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CEC1712 Datasheet(PDF) 86 Page - Microchip Technology

Part # CEC1712
Description  Cryptographic Embedded Controller
PDF  338 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

CEC1712 Datasheet(HTML) 86 Page - Microchip Technology

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CEC1712
DS00003416C-page 86
 2020-2021 Microchip Technology Inc.
5.7.2
NVIC RELATIONSHIP TO EXCEPTION VECTOR TABLE ENTRIES
The Vector Table consists of 4-byte entries, one per vector. Entry 0 is not a vector, but provides an initial Reset value
for the Main Stack Pointer. Vectors start with the Reset vector, at Entry #1. Entries up through #15 are dedicated for
internal exceptions, and do not involve the NVIC.
NVIC entries in the Vector Table start with Entry #16, so that NVIC Interrupt #0 is at Entry #16, and all NVIC interrupt
numbers are incremented by 16 before accessing the Vector Table.
The number of connections to the NVIC determines the necessary minimum size of the Vector Table, as shown below.
It can extend as far as 256 entries (255 vectors, plus the non-vector entry #0).
A Vector entry is used to load the Program Counter (PC) and the EPSR.T bit. Since the Program Counter only expresses
code addresses in units of two-byte Halfwords, bit[0] of the vector location is used to load the EPSR.T bit instead, select-
ing THUMB mode for exception handling. Bit[0] must be ‘1’ in all vectors, otherwise a UsageFault exception will be
posted (INVSTATE, unimplemented instruction set). If the Reset vector is at fault, the exception posted will be HardFault
instead.
TABLE 5-4:
EXCEPTION AND INTERRUPT VECTOR TABLE LAYOUT
Table Entry
Exception
Number
Exception
Special Entry for Reset Stack Pointer
0
(none)
Holds Reset Value for the Main Stack Pointer. Not a Vector.
Core Internal Exception Vectors start here
1
1
Reset Vector (PC + EPSR.T bit)
2
2
NMI (Non-Maskable Interrupt) Vector
3
3
HardFault Vector
4
4
MemManage Vector
5
5
BusFault Vector
6
6
UsageFault Vector
7
(none)
(Reserved by ARM Ltd.)
8
(none)
(Reserved by ARM Ltd.)
9
(none)
(Reserved by ARM Ltd.)
10
(none)
(Reserved by ARM Ltd.)
11
11
SVCall Vector
12
12
Debug Monitor Vector
13
(none)
(Reserved by ARM Ltd.)
14
14
PendSV Vector
15
15
SysTick Vector
NVIC Interrupt Vectors start here
16
16
NVIC Interrupt #0 Vector
.
.
.
.
.
.
.
.
.
n + 16
n + 16
NVIC Interrupt #n Vector
.
.
.
.
.
.
.
.
.
max + 16
max + 16
NVIC Interrupt #max Vector (Highest-numbered NVIC connection.)
.
.
.
.
.
.
. Table size may (but need not) extend further.
.
.
255
255
NVIC Interrupt #239 (Architectural Limit of Exception Table)



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