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MMPF0100 Datasheet(PDF) 64 Page - NXP Semiconductors

Part # MMPF0100
Description  14 channel configurable power management integrated circuit
PDF  136 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MMPF0100 Datasheet(HTML) 64 Page - NXP Semiconductors

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NXP Semiconductors
PF0100
FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS
Table 66 provides a list of registers used to configure and operate SW3A/B. A detailed description on each of these register is provided
on Tables 67 through Table 76.
Table 66. SW3AB register summary
Register
Address
Output
SW3AVOLT
0x3C
SW3A output voltage set point on normal operation
SW3ASTBY
0x3D
SW3A output voltage set point on standby
SW3AOFF
0x3E
SW3A output voltage set point on sleep
SW3AMODE
0x3F
SW3A switching mode selector register
SW3ACONF
0x40
SW3A DVS, phase, frequency and ILIM configuration
SW3BVOLT
0x43
SW3B output voltage set point on normal operation
SW3BSTBY
0x44
SW3B output voltage set point on standby
SW3BOFF
0x45
SW3B output voltage set point on sleep
SW3BMODE
0x46
SW3B switching mode selector register
SW3BCONF
0x47
SW3B DVS, phase, frequency and ILIM configuration
Table 67. Register SW3AVOLT - ADDR 0x3C
Name
Bit #
R/W
Default
Description
SW3A
5:0
R/W
0x00
Sets the SW3A output voltage (independent) or
SW3A/B output voltage (single/dual phase),
during normal operation mode. See Table 65 for
all possible configurations.
SW3A
6
R
0x00
Sets the operating output voltage range for SW3A
(independent) or SW3A/B (single/dual phase).
Set during OTP or TBB configuration only. See
Table 65 for all possible configurations.
UNUSED
7
–
0x00
unused
Table 68. Register SW3ASTBY - ADDR 0x3D
Name
Bit #
R/W
Default
Description
SW3ASTBY
5:0
R/W
0x00
Sets the SW3A output voltage (independent) or
SW3A/B output voltage (single/dual phase),
during standby mode. See Table 65 for all
possible configurations.
SW3ASTBY
6
R
0x00
Sets the operating output voltage range for SW3A
(independent) or SW3A/B (single/dual phase) on
standby mode. This bit inherits the value
configured on bit SW3A[6] during OTP or TBB
configuration. See Table 65 for all possible
configurations.
UNUSED
7
–
0x00
unused



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