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MMPF0100 Datasheet(PDF) 98 Page - NXP Semiconductors |
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MMPF0100 Datasheet(HTML) 98 Page - NXP Semiconductors |
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98 / 136 page ![]() 98 NXP Semiconductors PF0100 FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS 6.4.7.1 Coin cell battery backup The LICELL pin provides for a connection of a coin cell backup battery or a “super” capacitor. If the voltage at VIN goes below the VIN threshold (VTL1 and VTL0), contact-bounced, or removed, the coin cell maintained logic is powered by the voltage applied to LICELL. The supply for internal logic and the VSNVS rail switches over to the LICELL pin when VIN goes below VTL1 or VTL0, even in the absence of a voltage at the LICELL pin, resulting in clearing of memory and turning off of VSNVS. When system operation below VTL1 is required, for systems not utilizing a coin cell, connect the LICELL pin to any system voltage between 1.8 V and 3.0 V. A small capacitor should be placed from LICELL to ground under all circumstances. 6.4.7.1.1 Coin cell charger control The coin cell charger circuit functions as a current-limited voltage source, resulting in the CC/CV taper characteristic typically used for rechargeable Lithium-Ion batteries. The coin cell charger is enabled via the COINCHEN bit while the coin cell voltage is programmable through the VCOIN[2:0] bits on register COINCTL on Table 113. The coin cell charger voltage is programmable. In the on state, the charger current is fixed at ICOINHI. In Sleep and Standby modes, the charger current is reduced to a typical 10 μA. In the off state, coin cell charging is not available as the main battery could be depleted unnecessarily. The coin cell charging stops when VIN is below UVDET. VSNVS AC and transient (continued) VSNVSLOTR Transient load response • VSNVSVOLT[2:0] = 110 • 3.1 V (UVDETL)< VIN ≤ 4.5 V • ISNVS = 75 to 750 μA • VSNVSVOLT[2:0] = 000 to 101 • 2.45 V < VIN ≤ 4.5 V • VTL0 > VIN, 1.8 V ≤ VCOIN ≤ 3.3 V • ISNVS = 40 to 400 μA • Refer to Figure 31 2.8 – – 1.0 – 2.0 V % VSNVS DC, switch VINSNVS Operating input voltage • Valid coin cell range 1.8 – 3.3 V ISNVS Operating load current 5.0 – 400 μA RDSONSNVS Internal switch RDS(on) • VCOIN = 2.6 V – – 100 Ω VTL1 VIN threshold (VIN powered to coin cell powered) • VSNVSVOLT[2:0] = 110 2.725 2.90 3.00 V (80) VTH1 VIN threshold (coin cell powered to VIN powered) • VSNVSVOLT[2:0] = 110 2.775 2.95 3.1 V Notes 77. For 1.8 V ISNVS limited to 100 μA for VCOIN < 2.1 V 78. The start-up of VSNVS is not monotonic. It first rises to 1.0 V and then settles to its programmed value within the specified tr1 time. 79. From coin cell insertion to VSNVS =1.0 V, the delay time is typically 400 ms. 80. During crossover from VIN to LICELL, the VSNVS output voltage may drop to 2.7 V before going to the LICELL voltage. Though this is outside the specified DC voltage level for the VDD_SNVS_IN pin of the i.MX 6, this momentary drop does not cause any malfunction. The i.MX 6’s RTC continues to operate through the transition, and as a worst case it may switch to the internal RC oscillator for a few clock cycles before switching back to the external crystal oscillator. Table 111. VSNVS electrical characteristics (continued) All parameters are specified at TMIN to TMAX (See Table 3), VIN = 3.6 V, VSNVS = 3.0 V, ISNVS = 5.0 μA, typical external component values, unless otherwise noted. Typical values are characterized at VIN = 3.6 V, VSNVS = 3.0 V, ISNVS = 5.0 μA, and 25 °C, unless otherwise noted. Symbol Parameter Min Typ Max Unit Notes |
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