MCIMX503CVM8B datasheet(37/136 Pages) NXP

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Electrical Characteristics

i.MX50 Applications Processors for Consumer Products, Rev. 7

Freescale Semiconductor

4.4

Output Buffer Impedance Characteristics

This section defines the I/O impedance parameters of the i.MX50 processor.

Pull-up resistor (22 K

Ω PU)

Rpu

Vi=OVDD/2

Pull-up resistor (47 K

Ω PU)

Rpu

Vi=OVDD/2

148

Pull-up resistor (100 K

Ω PU)

Rpu

Vi=OVDD/2

156

Pull-down resistor (100 K

Ω PD)

Rpd

Vi=OVDD/2

256

Input current (no pull-up/down)

IIN

VI = 0

VI=OVDD

—

2.8

470

Input current (22 K

Ω PU)

IIN

VI = 0

VI=OVDD

—

153

0.05

μA

Input current (47 K

Ω PU)

IIN

VI = 0

VI=OVDD

——

0.05

μA

Input current (100 K

Ω PU)

IIN

VI = 0

VI=OVDD

——

0.05

μA

Input current (100 K

Ω PD)

IIN

VI = 0

VI=OVDD

—

0.47

μA

High-level output current, high voltage

mode

Ioh_hv

Vol=0.8*OVDD

Low Drive

Medium Drive

High Drive

-5.1

-10.2

-15.3

——

External pull-up / pull-down

resistor required to overdrive

internal keeper

Rext

—

2.5

1 To maintain a valid level, the transitioning edge of the input must sustain a constant slew rate (monotonic) from the current DC

level through to the target DC level, VIL or VIH. Monotonic input transition time is from 0.1 ns to 1 s. VIL and VIH do not apply

when hysteresis is enabled.

2 Hysteresis of 250 mV is guaranteed over all operating conditions when hysteresis is enabled.

Table 23. HVIO DC Electrical Characteristics (continued)

DC Electrical Characteristics

Symbol

Test Conditions

MIN

TYP

MAX

Units

MCIMX503CVM8B Datasheet(PDF) 37 Page - NXP Semiconductors

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