AD4697BCPZ datasheet(38/107 Pages) AD

38 / 107 page

Data Sheet

AD4697/AD4698

THEORY OF OPERATION

analog.com

Rev. 0 | 38 of 107

Alert Indicator Registers

The ALERT_STATUS1 and ALERT_STATUS2 registers contain the

upper alert indicators (HI_INn) and lower alert indicators (LO_INn)

for all eight analog inputs. The TD_ALERT bit in the status register

is the logical OR of the HI_INn and LO_INn bits. When the ADC

result is greater than or equal to the upper threshold value, the

corresponding HI_INn flag is set to 1. When the ADC result is

less than or equal to the lower threshold value, the corresponding

LO_INn flag is set to 1. When the OSR of an INn analog input is

greater than 1, the state of its corresponding HI_INn and LO_INn

flags update after the oversampled result is generated.

Reading the TD_ALERT bit indicates to the digital host whether

any upper or lower threshold was violated, and reading the HI_INn

and LO_INn bits indicates which specific type of threshold was

violated on which channel. The AD4697/AD4698 must be in register

configuration mode to read from the registers that contain these

alert indicator bits, but the state of TD_ALERT can also be read

via the status bits or a general-purpose pin when these options

are enabled (see the Status Bits section and Alert Indicator on

General-Purpose Pins section).

The HI_INn and LO_INn bits are read to clear bits and are auto-

matically reset to 0 after being read in a SPI read transaction (in

When the ALERT_MODE bit in the setup register is set to 0, the

HI_INn and LO_INn bits also automatically clear based on user pro-

grammable hysteresis settings. The hysteresis bit fields in the eight

HYST_INn registers set the hysteresis value for the corresponding

analog input. Each analog input can be programmed with different

hysteresis values. When this option is selected, each HI_INn bit au-

tomatically clears when the corresponding analog input generates

a conversion result that is less than the upper threshold value

minus the hysteresis value. Each LO_INn bit automatically clears

when the corresponding analog input generates a conversion result

that is greater than the lower threshold value plus the hysteresis

value. Figure 75 shows how the HI_INn and LO_INn bits are set

and cleared when ALERT_MODE is set to 0 and 1 as conversion

results are generated on the corresponding analog input channel.

ALERT_MODE is set to 0 by default.

Alert Indicator on General-Purpose Pins

When the alert indicator is enabled on a general-purpose pin,

the state of the TD_ALERT bit is driven on either BSY_ALT_GP0

or GP2, which allows threshold violations to be detected without

interrupting conversions. The combination of the alert indicator on

the general-purpose pins and autocycle mode allows the digital

host serial interface to remain idle until a threshold violation is

detected (see the Autocycle Mode section).

Figure 94 through Figure 99 show the relative timing of CNV rising

edges and when the state of the alert indicator is updated and

driven out on the general-purpose pin.

On the WLCSP options of the AD4698, the alert indicator can be

enabled on either the BSY_ALT_GP0 pin or the GP2 pin. The

ALERT_GP_SEL bit in the GP_MODE register selects which of the

general-purpose pins is configured as the alert indicator. Set the

ALERT_GP_EN bit in the GP_MODE register to 1 to enable the

alert indicator on the selected general-purpose pin (see Table 51).

On the LFCSP option of the AD4697/AD4698, the alert indicator

can be enabled only on the BSY_ALT_GP0 pin, and the state of

the ALERT_GP_SEL bit has no impact on device behavior. Set the

ALERT_GP_EN bit in the GP_MODE register to 1 to enable the

busy indicator on BSY_ALT_GP0 (see Table 51).

The BSY_ALT_GP0 and GP2 pins can also be configured to per-

form other functions than the alert indicator, and all other higher

priority functions must be disabled to configure them as the alert

indicator. See the General-Purpose Pins section for details on

configuring the general-purpose pins.

AD4697BCPZ Datasheet(PDF) 38 Page - Analog Devices

AD4697BCPZ Datasheet(HTML) 38 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL