AD4697BCPZ datasheet(75/107 Pages) AD

75 / 107 page

Data Sheet

AD4697/AD4698

APPLICATIONS INFORMATION

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Rev. 0 | 75 of 107

Reference Circuit Design for Internal Reference

Buffer

REFIN is the input to the AD4698 internal reference buffer (avail-

able on the WLCSP option only). The internal reference buffer

provides a true high impedance input for directly interfacing a

precision voltage reference to the AD4698.

Figure 117 shows a typical connection diagram for interfacing

external reference circuitry with the internal reference buffer. VREF

drives the REFIN input, and the REF input is connected only to

CREF.

Figure 117. Typical Connection Diagram for Driving REFIN Input

The typical input leakage current of the REFIN input is 16 nA when

the internal reference buffer is enabled (see Table 1). Using the

equations for RO_MAX and LMAX in the Reference Circuit Design

for Driving REF Input section, for a 4.096 V reference, half LSB

accuracy is maintained for an effective series resistance of 2.3 kΩ.

Optional low-pass filtering can be implemented between the voltage

reference output and the REFIN input to reduce wideband noise as

long as the effective series resistance of the filter combined with

the output impedance of the connected voltage reference maintain

adequate accuracy in VREF.

Reference input high-Z mode must be enabled when utilizing the

internal reference buffer (REFHIZ_EN = 1). The internal reference

buffer is disabled by default, and must be enabled on device power-

up and after device resets. When the internal reference buffer is

first enabled by setting REFBUF_EN to 1, the internal reference

buffer charges CREF until it reaches the VREF voltage. See the

Optimizing Reference Buffer Startup section for a description of the

AD4697/AD4698 configuration settings that determine the amount

of time required for the internal reference buffer to settle the VREF

on startup.

The internal reference buffer is supplied from the AD4697/AD4698

AVDD supply, and when the internal reference buffer is enabled,

VREF must be at most AVDD – 0.3 V (see Table 1).

OPTIMIZING REFERENCE BUFFER STARTUP

When using the AD4697/AD4698 internal reference buffer, the REF

input is disconnected from the external reference circuitry and

is only connected to the external reference decoupling capacitor

(CREF in Figure 117). When the internal reference buffer is disabled,

CREF slowly discharges. As a result, if the voltage across CREF is

not equal to the REFIN voltage when the internal reference buffer is

first enabled, the internal reference buffer output current spikes until

it has sourced enough charge to CREF. The process of charging

CREF incurs both a time delay before accurate conversions can be

performed and a spike in the AVDD supply current. Suggestions for

optimizing the delay and the peak supply current when enabling the

internal reference buffer follow.

The internal reference buffer turn-on time specification in Table 1

is defined as the time required for the internal reference buffer

to drive the REF pin from 0 V to VREF within 0.01% accuracy.

Larger CREF capacitors and VREF voltages require more charge to

be driven into CREF, and as a result, the internal reference buffer

turn-on time is proportional to CREF and VREF. Figure 44 shows

the typical reference buffer output settling for VREF = 4.096 V for

several common values of CREF.

The internal reference buffer is powered by the AVDD supply. While

the internal reference buffer sources current into CREF, an equal

amount of current is drawn through AVDD. Higher internal reference

buffer output currents therefore reduce the internal reference buffer

turn-on time but increase the peak AVDD current until the REF pin

voltage is settled to VREF. The AD4697/AD4698 provide several

options for enabling the internal reference buffer to either optimize

turn-on time or peak current consumption.

Reference Buffer Startup with Bypass Option

The internal reference buffer bypass option is recommended to

reduce the AVDD peak current when first enabling the internal

reference buffer (for example, on device power-up). The internal

reference buffer bypass option connects REFIN to REF without en-

abling the internal reference buffer, allowing the voltage reference

driving REFIN to charge CREF to VREF while the internal reference

buffer is disabled. This option ensures that he voltage on the REF

input is closer to the target VREF before the internal reference

buffer is enabled, reducing the magnitude of the internal reference

buffer peak output current, and therefore, the resulting peak AVDD

current.

When using the internal reference buffer bypass option to charge

CREF after initially powering on the device, take the following steps:

1. Write to the REF_CTRL register to set the REFBUF_EN bit to

0 and the REFBUF_BP bit to 1 to close SWBP and bypass the

internal reference buffer. (REFBUF_EN is set to 0 on device

power-up.)

2. Configure the rest of the device configuration registers before

enabling the internal reference buffer to give the voltage refer-

ence circuitry time to charge CREF.

3. Write to the REF_CTRL register to set the REFBUF_EN bit to

1 and the REFBUF_BP bit to 0 to open SWBP and enable the

internal reference buffer.

The internal reference buffer bypass option is also recommended

for applications where the AD4697/AD4698 is idle (not converting)

for long periods of time to reduce power consumption because

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