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AM6421 Datasheet(PDF) 8 Page - Texas Instruments

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Part # AM6421
Description  AM64x Sitara™ Processors
PDF  260 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
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AM6421 Datasheet(HTML) 8 Page - Texas Instruments

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• (I2C OD FS Electrical Characteristics): Defined the minimum input slew rate value and added notes to
describe this parameter.................................................................................................................................. 103
• Removed non-applicable TBD values. .......................................................................................................... 104
• Defined the minimum input slew rate value and added notes to describe this parameter..............................104
• (High-Frequency Oscillator (HFOSC) Electrical Characteristics): Defined maximum Input Leakage Current
value............................................................................................................................................................... 104
• (SDIO Electrical Characteristics): Removed non-applicable TBD values from 3.3-V mode Input Slew Rate.105
• (SDIO Electrical Characteristics): Defined the minimum input slew rate value and added notes to describe
this parameter.................................................................................................................................................105
• (LVCMOS Electrical Characteristics): Removed non-applicable TBD values from 1.8-V mode and 3.3-V mode
Input Slew Rate.............................................................................................................................................. 106
• (LVCMOS Electrical Characteristics): Defined the minimum input slew rate value and added notes to describe
this parameter.................................................................................................................................................106
• (ADC12B Electrical Characteristics): Added Positive Reference Voltage and Negative Reference Voltage
parameters, with a note that describes connectivity requirements for the ADC0_REFP and ADC0_REFN pins
........................................................................................................................................................................107
• (ADC12B Electrical Characteristics): Changed the Differential Non-Linearity values; the minimum value was
changed from -1 to > -1 to indicate there is no missing codes, the typical value was removed, and the
maximum value was changed from 2 to +1.................................................................................................... 107
• (ADC12B Electrical Characteristics): Changed the Integral Non-Linearity values; the minimum value was
changed to -2, the typical value was removed, and the maximum value was changed from ±3 to +2........... 107
• (ADC12B Electrical Characteristics): Changed the typical Gain Error value from ±2 to ±10..........................107
• (ADC12B Electrical Characteristics): Changed the typical Offset Error value from ±2 to ±5.......................... 107
• (ADC12B Electrical Characteristics): Changed the “Input Sampling Capacitance (CIN)” parameter to
“Sampling Capacitance (CSMPL)”, with the same typical value....................................................................... 107
• (ADC12B Electrical Characteristics): Changed the typical Total Harmonic Distortion value from 75 to -75... 107
• (ADC12B Electrical Characteristics): Removed the Spurious Free Dynamic Range and Signal-to-Noise Plus
Distortion parameters..................................................................................................................................... 107
• (ADC12B Electrical Characteristics): Changed the “Input Impedance of ADC0_AIN[7:0] (RADC0_AIN[7:0])”
parameter to “Analog Input Impedance, ADC0_AIN[7:0] (ZADC0_AIN[7:0])” and replaced the formula for
calculating a typical value with a note that clarifies input impedance of the ADC0_AIN[7:0] analog inputs... 107
• (ADC12B Electrical Characteristics): Removed the VSS and VDDA_ADC0 test conditions from the Input
Leakage parameter and defined a single maximum value that represents the entire input voltage range of the
ADC0_AIN[7:0] analog inputs.........................................................................................................................107
• (ADC12B Electrical Characteristics): Removed the Channel to Channel Isolation parameter....................... 107
• (ADC12B Electrical Characteristics): Changed the maximum input leakage of General Purpose Input Mode
from 2μA to 10μA............................................................................................................................................107
• (Power-Up Sequencing): Added a separate waveform for VDDSHV5 with a reference to Note 12 that clarifies
this power rail supports power-up, power-down, or dynamic voltage change without any dependency on other
power rails.......................................................................................................................................................114
• (Power-Down Sequencing): Added a separate waveform for VDDSHV5 with a reference to Note 6 that
clarifies this power rail supports power-up, power-down, or dynamic voltage change without any dependency
on other power rails.........................................................................................................................................116
• Included "Recommended Clock, System, and Control Signal Transition Behavior" section and associated
details............................................................................................................................................................. 131
• (Clock Specifications): Included an new/updated section titled "Recommended System Precautions for Clock
and Control Signal Transitions"...................................................................................................................... 131
• (CPSW3G): Updated the Note to reference the CPSW3G IOSETs section for the several tables contained
within the section............................................................................................................................................ 132
• (GPIO Timing Conditions): Changed the minimum Input Slew rate for the LVCMOS buffer type, and defined
Input Slew Rate values for the I2C OD FS buffer type................................................................................... 146
• (GPIO Timing Requirements): Changed the "BUFFER TYPE" column to "MODE", replaced buffer types with
operating voltage, retained the minimum pulse width value for 1.8-V mode, and changed the minimum pulse
width value for 3.3-V mode............................................................................................................................. 146
AM6442, AM6441, AM6422, AM6421, AM6412, AM6411
SPRSP56E – JANUARY 2021 – REVISED SEPTEMBER 2022
www.ti.com
8
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Product Folder Links: AM6442 AM6441 AM6422 AM6421 AM6412 AM6411



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