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AM6421 Datasheet(PDF) 89 Page - Texas Instruments |
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AM6421 Datasheet(HTML) 89 Page - Texas Instruments |
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89 / 260 page ![]() Table 6-62. SERDES0 Signal Descriptions (continued) SIGNAL NAME [1] ((2)) PIN TYPE [2] DESCRIPTION [3] ALV PIN [4] SERDES0_RX0_P I SerDes PHY Differential Receive Data (positive) Y16 SERDES0_TX0_N O SerDes PHY Differential Transmit Data (negative) AA16 SERDES0_TX0_P O SerDes PHY Differential Transmit Data (positive) AA17 (1) An external 3.01 kΩ ±1% resistor must be connected between this pin and VSS. No external voltage should be applied to this pin. (2) The functionality of these pins is controlled by SERDES0_LN0_CTRL_LANE_FUNC_SEL. 6.3.22 System and Miscellaneous 6.3.22.1 Boot Mode Configuration 6.3.22.1.1 MAIN Domain Table 6-63. Sysboot Signal Descriptions SIGNAL NAME [1] PIN TYPE [2] DESCRIPTION [3] ALV PIN [4] BOOTMODE00 I Bootmode pin 0 T20 BOOTMODE01 I Bootmode pin 1 U21 BOOTMODE02 I Bootmode pin 2 T18 BOOTMODE03 I Bootmode pin 3 U20 BOOTMODE04 I Bootmode pin 4 U18 BOOTMODE05 I Bootmode pin 5 U19 BOOTMODE06 I Bootmode pin 6 V20 BOOTMODE07 I Bootmode pin 7 V21 BOOTMODE08 I Bootmode pin 8 V19 BOOTMODE09 I Bootmode pin 9 T17 BOOTMODE10 I Bootmode pin 10 R16 BOOTMODE11 I Bootmode pin 11 W20 BOOTMODE12 I Bootmode pin 12 W21 BOOTMODE13 I Bootmode pin 13 V18 BOOTMODE14 I Bootmode pin 14 Y21 BOOTMODE15 I Bootmode pin 15 Y20 6.3.22.2 Clock 6.3.22.2.1 MCU Domain Table 6-64. MCU Clock Signal Descriptions SIGNAL NAME [1] PIN TYPE [2] DESCRIPTION [3] ALV PIN [4] MCU_OSC0_XI I High frequency oscillator input C21 MCU_OSC0_XO O High frequency oscillator output B20 6.3.22.3 System 6.3.22.3.1 MAIN Domain Table 6-65. System Signal Descriptions SIGNAL NAME [1] PIN TYPE [2] DESCRIPTION [3] ALV PIN [4] CLKOUT0 O RMII Clock Output (50 MHz). This pin is used for clock source to the external PHY and must be routed back to the RMII_REF_CLK pin for proper device operation. A19, U13 EXTINTn I External Interrupt C19 EXT_REFCLK1 I External clock input to Main Domain, routed to Timer clock muxes as one of the selectable input clock sources for Timer/WDT modules, or as reference clock to MAIN_PLL2 (PER1 PLL) A19 www.ti.com AM6442, AM6441, AM6422, AM6421, AM6412, AM6411 SPRSP56E – JANUARY 2021 – REVISED SEPTEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 89 Product Folder Links: AM6442 AM6441 AM6422 AM6421 AM6412 AM6411 |
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