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STM32U5A5QJ Datasheet(PDF) 69 Page - STMicroelectronics |
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STM32U5A5QJ Datasheet(HTML) 69 Page - STMicroelectronics |
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69 / 382 page ![]() DS13543 Rev 1 69/382 STM32U5Axxx Functional overview 99 3.31.4 Internal voltage reference (VREFINT) The VREFINT provides a stable (bandgap) voltage output for the ADC and the comparators. The VREFINT is internally connected to ADC1, ADC2 and ADC4 input channels. The precise voltage of VREFINT is individually measured for each part by STMicroelectronics during production test and stored in the system memory area. It is accessible in read-only mode. 3.31.5 VBAT battery voltage monitoring This embedded hardware enables the application to measure the VBAT battery voltage using ADC1, ADC2 or ADC4 input channel. As the VBAT voltage may be higher than the VDDA, and thus outside the ADC input range, the VBAT pin is internally connected to a bridge divider by four. As a consequence, the converted digital value is a quarter of the VBAT voltage. 3.32 Digital to analog converter (DAC) The DAC module is a 12-bit, voltage output digital-to-analog converter. The DAC can be configured in 8- or 12-bit mode and may be used in conjunction with the DMA controller. In 12-bit mode, the data may be left- or right-aligned. The DAC features two output channels, each with its own converter. In dual DAC channel mode, conversions can be done independently or simultaneously when both channels are grouped together for synchronous update operations. An input reference pin, VREF+ (shared with others analog peripherals) is available for better resolution. An internal reference can also be set on the same input. The DAC_OUTx pin can be used as general purpose input/output (GPIO) when the DAC output is disconnected from output pad and connected to on chip peripheral. The DAC output buffer can be optionally enabled to allow a high drive output current. An individual calibration can be applied on each DAC output channel. The DAC output channels support a low-power mode, the sample and hold mode. The digital interface supports the following features: • One DAC interface, maximum two output channels Table 16. Temperature sensor calibration values Calibration value name Description Memory address TS_CAL1 Temperature sensor 14-bit raw data acquired by ADC1 at 30 °C (± 5 °C), VDDA = VREF+ = 3.0 V (± 10 mV) 0x0BFA 0710 - 0x0BFA 0711 TS_CAL2 Temperature sensor 14-bit raw data acquired by ADC1 at 130 °C (± 5 °C), VDDA = VREF+ = 3.0 V (± 10 mV) 0x0BFA 0742 - 0x0BFA 0743 Table 17. Internal voltage reference calibration values Calibration value name Description Memory address VREFINT_CAL 14-bit raw data acquired by ADC1 at 30 °C (± 5 °C), VDDA = VREF+ = 3.0 V (± 10 mV) 0x0BFA 07A5 - 0x0BFA 07A6 |
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