 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
STM32U5A5QJ Datasheet(PDF) 98 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM32U5A5QJ Datasheet(HTML) 98 Page - STMicroelectronics |
|
|
98 / 382 page  Functional overview STM32U5Axxx 98/382 DS13543 Rev 1 Host-mode features: • External charge pump for VBUS voltage generation • Up to 16 host channels (pipes): each channel is dynamically reconfigurable to allocate any type of USB transfer • Built-in hardware scheduler holding: – Up to 16 interrupt plus isochronous transfer requests in the periodic hardware queue – Up to 16 control plus bulk transfer requests in the non-periodic hardware queue • Management of a shared Rx FIFO, a periodic Tx FIFO and a non periodic Tx FIFO for efficient usage of the USB data RAM Peripheral-mode features: • 1 bidirectional control endpoint0 • 8 IN endpoints (EPs) configurable to support bulk, interrupt or isochronous transfers • 8 OUT endpoints configurable to support bulk, interrupt or isochronous transfers • Management of a shared Rx FIFO and a Tx-OUT FIFO for efficient usage of the USB data RAM • Management of up to 9 dedicated Tx-IN FIFOs (one for each active IN EP) to put less load on the application • Support for the soft disconnect feature 3.56 USB Type-C /USB Power Delivery controller (UCPD) The device embeds one controller (UCPD) compliant with USB Type-C Cable and Connector Specification release 2.0 and USB Power Delivery Rev. 3.0 specifications. The controller uses specific I/Os supporting the USB Type-C and USB power delivery requirements, featuring: • USB Type-C pull-up (Rp, all values) and pull-down (Rd) resistors • “Dead battery” support • USB power delivery message transmission and reception • FRS (fast role swap) support The digital controller handles notably: • USB Type-C level detection with debounce, generating interrupts • FRS detection, generating an interrupt • Byte-level interface for USB power delivery payload, generating interrupts (DMA compatible) • USB power delivery timing dividers (including a clock prescaler) • CRC generation/checking • 4b5b encode/decode • Ordered sets (with a programmable ordered set mask at receive) • Frequency recovery in receiver during preamble The interface offers low-power operation compatible with Stop mode, maintaining the capacity to detect incoming USB power delivery messages and FRS signaling. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
