STM32U5A5QJ datasheet(18/382 Pages) STMICROELECTRONICS

18 / 382 page

Description

STM32U5Axxx

18/382

DS13543 Rev 1

The devices embed mathematical accelerators (a trigonometric functions accelerator plus a

filter mathematical accelerator). In addition, up to 22 capacitive sensing channels are

available.

The devices also feature standard and advanced communication interfaces such as: six

I2Cs, three SPIs, four USARTs, two UARTs and one low-power UART, two SAIs, one DCMI

(digital camera interface), two SDMMCs, one FDCAN, one USB OTG high-speed, one

USB Type-C™/USB Power Delivery controller, and one generic synchronous 8-/16-bit PSSI

(parallel data input/output slave interface).

The devices operate in the –40 to +85 °C (+ 105 °C junction) and –40 to +125 °C

(+130 °C junction) temperature ranges from a 1.71 to 3.6 V power supply.

A comprehensive set of power-saving modes allow the design of low-power applications.

Many peripherals (including communication, analog, timers and audio peripherals) can be

functional and autonomous down to Stop mode with direct memory access, thanks to

LPBAM support (low-power background autonomous mode).

Some independent power supplies are supported like an analog independent supply input

for ADC, DACs, OPAMPs and comparators, a 3.3 V dedicated supply input for USB and

up to 14 I/Os, that can be supplied independently down to 1.08 V. A VBAT input is available

for connecting a backup battery in order to preserve the RTC functionality and to backup

32 32-bit registers and 2-Kbyte SRAM.

The devices offer ten packages from 64 to 216 pins.

Table 2. STM32U5Axxx features and peripheral counts

Peripherals

Flash memory (Mbytes)

SRAM

System (Kbytes)

2512(768+64+832+16+832)

Backup (bytes)

2048 backup SRAM + 128 backup registers

External memory

controller for static

memories (FSMC)

Yes(1)

OCTOSPI

2(2)

HSPI

Yes

Neo-Chrom

(GPU2D)

Yes

Chrom-GRC

(GFXMMU)

Yes

Chrom-ART

(DMA2D)

Yes

DSI

Yes

LTDC

Yes

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