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ISL73141SEHF7/PROTO Datasheet(PDF) 9 Page - Renesas Technology Corp

Part # ISL73141SEHF7/PROTO
Description  Radiation Hardened 14-Bit 1MSPS SAR ADC
PDF  28 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ISL73141SEHF7/PROTO Datasheet(HTML) 9 Page - Renesas Technology Corp

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ISL73141SEH
3. Specifications
R34DS0012EU0402 Rev.4.2
Page 9 of 27
Feb 23, 2023
Analog Input Characteristics (AIN)
Input Voltage Range, AIN
AIN
Recommended operating condition
0
VREF
V
Absolute Input Range, AIN
-0.1
AVCC + 0.1
V
Input Leakage Current
IAIN
-1
1
µA
Input Capacitance
Sample Mode
15
pF
Hold Mode
3
pF
Reference Input Characteristics (REF)
REF Input Voltage Range
VREF
1.95
AVCC
V
REF Input Current
IREF
82
150
µA
Power Supply Characteristics (AVCC, DVCC)
Analog Supply Voltage
AVCC
33.6
V
Analog Supply Current - Active
IAVCC
Active, fSAMP = 750ksps
8.5
10.5
mA
Analog Supply Current - Static
IStatic
CS held High
3.7
6.5
mA
Analog Supply Current - Sleep
ISLAVCC PD held Low
4.6
10
µA
Digital Supply Voltage
DVCC
2.2
3.6
V
Digital Supply Current - Active
IDVCC
fSCK = 33MHz, 10pF load
70
90
µA
Digital Supply Current - Static
ISTDVCC CS held High
27
35
µA
Digital Supply Current - Sleep
ISLDVCC PD held Low
6
8
µA
PD
PACTIVE Sample rate = 750ksps
28
33.9
mW
PSTATIC CS held High
12.3
21.6
mW
PSLEEP PD held Low
30.2
53
µW
Digital Inputs and Outputs (PD, CS, SCK, BUSY, SDO)
High Level Input
VIH
0.8*DVCC
V
Low Level Input
VIL
0.2*DVCC
V
Input Current (CS, SCK)
IIN
VIN = 0V to DVCC
-1
1
µA
Input Capacitance
CIN
5pF
High Level Output
VOH
DVCC - Output, IO = -500µA
DVCC - 0.2
V
Low Level Output
VOL
IO = 500µA
0.2
V
Output Source Current
ISRC
VOUT = 0V to DVCC
-10
mA
Output Sink Current
ISNK
VOUT = 0V to DVCC
10
mA
Hi-Z Output Leakage Current
IOZ
VOUT = 0V to DVCC
-1
1
µA
PD Input Resistance
RINPDL Internal pull-up resistance to DVCC
400
500
600
kΩ
Notes:
8. Typical values shown are not guaranteed. Values derived from +25°C median data.
9. Parameters with MIN and/or MAX limits are 100% tested at -55°C, +25°C, and +125°C, unless otherwise specified.
10. Limits valid post radiation test with LDR [0.01rad(Si)/s] at 75krad(Si).
AVCC = 3.3V; DVCC = 2.5V, REF = 3.0V, GND = 0V, fSAMP = 750ksps, AIN = -1dBFS; TA = -55°C to +125°C, unless otherwise noted. (Cont.)
Parameter
Symbol
Test Conditions
Min
(Notes 9, 10)
Typ
(Note 8)
Max
(Notes 9, 10)Unit



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