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STC12LE5604 Datasheet(PDF) 102 Page - STCmicro Technology Co,.Ltd

Part # STC12LE5604
Description  Enhanced 8051 Central Processing Unit ,1T per machine cycle, faster 8~12 times than the rate of a standard 8051.
PDF  377 Pages
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Manufacturer  STC [STCmicro Technology Co,.Ltd]
Direct Link  http://www.stcmicro.com/
Logo STC - STCmicro Technology Co,.Ltd

STC12LE5604 Datasheet(HTML) 102 Page - STCmicro Technology Co,.Ltd

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INC
@Ri
Bytes:
1
Cycles:
1
Encoding:
0 0 0 0
0 1 1 i
Operation:
INC
((Ri))←((Ri)) + 1
←((Ri)) + 1
((Ri)) + 1
INC
DPTR
Function:
Increment Data Pointer
Description:
Increment the 16-bit data pointer by 1. A 16-bit increment (modulo 216) is performed; an
overflow of the low-order byte of the data pointer (DPL) from 0FFH to 00H will increment
the high-order-byte (DPH). No flags are affected.
This is the only 16-bit register which can be incremented.
Example:
Register DPH and DPL contains 12H and 0FEH,respectively. The instruction sequence,
INC DPTR
INC DPTR
INC DPTR
will change DPH and DPL to 13H and 01H.
Bytes:
1
Cycles:
2
Encoding:
1 0 1 0
0 0 1 1
Operation:
INC
(DPTR) ← (DPTR)+1
← (DPTR)+1
JB
bit, rel
Function:
Jump if Bit set
Description:
If the indicated bit is a one, jump to the address indicated; otherwise proceed with the next
instruction. The branch destination is computed by adding the signed relative-displacement
in the third instruction byte to the PC, after incrementing the PC to the first byte of the next
instruction. The bit tested is not modified. No flags are affected.
Example:
The data present at input port 1 is 11001010B. The Accumulator holds 56 (01010110B). The
instruction sequence,
JB
P1.2, LABEL1
JB
ACC.2, LABEL2
will cause program execution to branch to the instruction at label LABEL2.
Bytes:
3
Cycles:
2
Encoding:
0 0 1 0
0 0 0 0
bit address
rel. address
Operation:
JB
(PC) ← (PC)+ 3
← (PC)+ 3
(PC)+ 3
IF (bit) = 1
THEN
(PC) ← (PC) + rel
← (PC) + rel
(PC) + rel
102



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