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C8051F360 Datasheet(PDF) 89 Page - Silicon Laboratories |
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C8051F360 Datasheet(HTML) 89 Page - Silicon Laboratories |
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89 / 288 page  SFRNEXT SFRPAGE SFRLAST CIP-51 Interrupt Logic SFRPGCN Bit Rev. 1.0 89 C8051F360/1/2/3/4/5/6/7/8/9 Figure 9.3. SFR Page Stack Automatic hardware switching of the SFR Page on interrupts may be enabled or disabled as desired using the SFR Automatic Page Control Enable Bit located in the SFR Page Control Register (SFR0CN). This function defaults to ‘enabled’ upon reset. In this way, the autoswitching function will be enabled unless dis- abled in software. A summary of the SFR locations (address and SFR page) is provided in Table 9.2. in the form of an SFR memory map. Each memory location in the map has an SFR page row, denoting the page in which that SFR resides. Note that certain SFR’s are accessible from ALL SFR pages, and are denoted by the back- ground shading in the table. For example, the Port I/O registers P0, P1, P2, and P3 all have a shaded background, indicating these SFR’s are accessible from all SFR pages regardless of the SFRPAGE regis- ter value. |
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