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C8051F360 Datasheet(PDF) 34 Page - Silicon Laboratories |
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C8051F360 Datasheet(HTML) 34 Page - Silicon Laboratories |
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34 / 288 page ![]() C8051F360/1/2/3/4/5/6/7/8/9 34 Rev. 1.0 Other electrical characteristics tables are found in the data sheet section corresponding to the associated peripherals. For more information on electrical characteristics for a specific peripheral, refer to the page indicated in Table 3.2. Digital Supply Current—CPU Inactive (Idle Mode, not fetching instructions from Flash) IDD2 VDD = 3.6 V, F = 100 MHz — 36 40 mA VDD = 3.6 V, F = 25 MHz — 9 12 mA VDD = 3.0 V, F = 100 MHz — 30 35 mA VDD = 3.0 V, F = 25 MHz — 7 9 mA VDD = 3.0 V, F = 1 MHz — 0.24 — mA VDD = 3.0 V, F = 80 kHz — 19 — µA IDD Supply Sensitivity3 F = 25 MHz — 44 — %/V F = 1 MHz — 43.7 — %/V IDD Frequency Sensitivity3,5 VDD = 3.0 V, F <= 1 MHz, T = 25 °C — 0.24 — mA/MHz VDD = 3.0 V, F > 1 MHz, T = 25 °C — 0.25 — mA/MHz VDD = 3.6 V, F <= 1 MHz, T = 25 °C — 0.31 — mA/MHz VDD = 3.6 V, F > 1 MHz, T = 25 °C — 0.32 — mA/MHz Digital Supply Current (Stop Mode, shutdown) Oscillator not running, VDD Monitor Disabled —< 0.1 — µA Notes: 1. SYSCLK must be at least 32 kHz to enable debugging. 2. SYSCLK is the internal device clock. For operational speeds in excess of 30 MHz, SYSCLK must be derived from the Phase-Locked Loop (PLL). 3. Based on device characterization data; Not production tested. 4. IDD can be estimated for frequencies < 20 MHz by simply multiplying the frequency of interest by the frequency sensitivity number for that range. When using these numbers to estimate IDD for >20 MHz, the estimate should be the current at 25 MHz minus the difference in current indicated by the frequency sensitivity number. For example: VDD = 3.0 V; F = 20 MHz, IDD = 15.9 mA - (25 MHz - 20 MHz) * 0.38 mA/MHz = 14 mA. 5. Idle IDD can be estimated for frequencies < 1 MHz by simply multiplying the frequency of interest by the frequency sensitivity number for that range. When using these numbers to estimate Idle IDD for >1 MHz, the estimate should be the current at 25 MHz minus the difference in current indicated by the frequency sensitivity number. For example: VDD = 3.0 V; F = 5 MHz, Idle IDD = 7.2 mA - (25 MHz - 5 MHz) * 0.25 mA/MHz = 2.2 mA. Table 3.1. Global Electrical Characteristics (Continued) –40 to +85 °C, 25 MHz system clock unless otherwise specified. Parameter Conditions Min Typ Max Units |
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