C8051F360 datasheet(30/288 Pages) SILABS

30 / 288 page

VDD

Crossbar

SET

CLR

SET

CLR

(SYNCHRONIZER)

GND

CP1 +

CP1 -

CP1

CP1A

CP1

Interrupt

CP1RIF

CP1FIF

CP1EN

P2.1 / P1.3

P2.6 / P1.7

P3.4 / P2.3

P4.0 / P2.7

P2.0 / P1.2

P2.5 / P1.6

P3.3 / P2.2

P3.7 / P2.6

CMX1N0

CMX1P1

CMX1P0

CMX1N1

CP1EN

CP1OUT

CP1RIF

CP1FIF

CP1HYP1

CP1HYP0

CP1HYN1

CP1HYN0

CP1RIE

CP1FIE

CP1MD1

CP1MD0

C8051F360/1/2/3/4/5/6/7/8/9

Rev. 1.0

Figure 1.13. Comparator1 Block Diagram

1.9.

10-bit Current Output DAC

The C8051F360/1/2/6/7/8/9 devices includes a 10-bit current-mode Digital-to-Analog Converter (IDA0).

The maximum current output of the IDA0 can be adjusted for three different current settings; 0.5 mA,

1 mA, and 2 mA. IDA0 features a flexible output update mechanism which allows for seamless full-scale

changes and supports jitter-free updates for waveform generation. Three update modes are provided,

allowing IDA0 output updates on a write to IDA0H, on a Timer overflow, or on an external pin edge.

C8051F360 Datasheet(PDF) 30 Page - Silicon Laboratories

C8051F360 Datasheet(HTML) 30 Page - Silicon Laboratories

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