Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

MPC8280 Datasheet(PDF) 748 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 748 Page - Freescale Semiconductor, Inc

Back Button MPC8280 Datasheet HTML 744Page - Freescale Semiconductor, Inc MPC8280 Datasheet HTML 745Page - Freescale Semiconductor, Inc MPC8280 Datasheet HTML 746Page - Freescale Semiconductor, Inc MPC8280 Datasheet HTML 747Page - Freescale Semiconductor, Inc MPC8280 Datasheet HTML 748Page - Freescale Semiconductor, Inc MPC8280 Datasheet HTML 749Page - Freescale Semiconductor, Inc MPC8280 Datasheet HTML 750Page - Freescale Semiconductor, Inc MPC8280 Datasheet HTML 751Page - Freescale Semiconductor, Inc MPC8280 Datasheet HTML 752Page - Freescale Semiconductor, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 748 / 1386 page
background image
SCC HDLC Mode
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
22-18
Freescale Semiconductor
22.13.2 SCC HDLC Programming Example #2
The following sequence initializes an HDLC channel that uses the DPLL in a Manchester encoding.
Provide a clock which is 16
× the chosen bit rate of CLK3. Then connect CLK3 to the HDLC transmitter
and receiver. (A baud rate generator could be used instead.) Configure SCC2 to use RTS2, CTS2, and CD2.
1. Follow steps 1–22 in example #1 above.
2. Write 0x004A_A400 to GSMR_L2 to make carrier sense always active, a 16-bit preamble of ‘01’
patterns, 16
× operation of the DPLL and Manchester encoding for the receiver and transmitter, and
HDLC mode. CTS and CD should be configured to control transmission and reception. Do not set
GSMR[ENT, ENR].
3. Write 0x0000 to PSMR2 to use one opening and one closing flag and 16-bit CCITT-CRC and to
reject multiple frames in the FIFO.
4. Write 0x004A_A430 to GSMR_L2 to enable the SCC2 transmitter and receiver. This additional
write to GSMR_L2 ensures that ENT and ENR are enabled last.
22.14 HDLC Bus Mode with Collision Detection
The HDLC controller includes an option for hardware collision detection and retransmission on an
open-drain connected HDLC bus, referred to as HDLC bus mode. Most HDLC-based controllers provide
only point-to-point communications; however, the HDLC bus enhancement allows implementation of an
HDLC-based LAN and other point-to-multipoint configurations. The HDLC bus is based on techniques
used in the CCITT ISDN I.430 and ANSI T1.605 standards for D-channel point-to-multipoint operation
over the S/T interface. However, the HDLC bus does not fully comply with I.430 or T1.605 and cannot
replace devices that implement these protocols. Instead, it is more suited to non-ISDN LAN and
point-to-multipoint configurations.
Review the basic features of the I.430 and T1.605 before learning about the HDLC bus. The I.430 and
T1.605 define a way to connect eight terminals over the D-channel of the S/T ISDN bus. The layer 2
protocol is a variant of HDLC, called LAPD. However, at layer 1, a method is provided to allow the eight
terminals to send frames to the switch through the physical S/T bus.
To determine whether a channel is clear, the S/T interface device looks at an echo bit on the line designed
to echo the last bit sent on the D channel. Depending on the class of terminal and the context, an S/T
interface device waits for 7–10 ones on the echo bit before letting the LAPD frame begin transmission,
after which the S/T interface monitors transmitted data. As long as the echo bit matches the sent data,
transmission continues. If the echo bit is ever 0 when the transmit bit is 1, a collision occurs between
terminals; the station(s) that sent a zero stops transmitting. The station that sent a 1 continues as normal.
The I.430 and T1.605 standards provide a physical layer protocol that allows multiple terminals to share
one physical connection. These protocols handle collisions efficiently because one station can always
complete its transmission, at which point, it lowers its own priority to give other devices fair access to the
physical connection.
The HDLC bus differs from the I.430 and T1.605 standards as follows:
•
The HDLC bus uses a separate input signal rather than the echo bit to monitor data; the transmitted
data is simply connected to the CTS input.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com