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MPC8280 Datasheet(PDF) 749 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 749 Page - Freescale Semiconductor, Inc

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SCC HDLC Mode
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
Freescale Semiconductor
22-19
•
The HDLC bus is a synchronous, digital open-drain connection for short-distance configurations,
rather than the more complex S/T interface.
•
Any HDLC-based frame protocol can be used at layer 2, not just LAPD.
•
HDLC bus devices wait 8–10 rather than 7–10 bit times before transmitting. (HDLC bus has only
one class.)
The collision-detection mechanism supports only:
•
NRZ-encoded data
•
A common synchronous clock for all receivers and transmitters
•
Non-inverted data (GSMR[RINV, TINV] = 0)
•
Open-drain connection with no external transceivers
Figure 22-10 shows the most common HDLC bus LAN configuration, a multimaster configuration. A
station can transfer data to or from any other LAN station. Transmissions are half-duplex, which is typical
in LANs.
Figure 22-10. Typical HDLC Bus Multi-Master Configuration
In single-master configuration, a master station transmits to any slave station without collisions. Slaves
communicate only with the master, but can experience collisions in their access over the bus. In this
configuration, a slave that communicates with another slave must first transmit its data to the master, where
the data is buffered in RAM and then resent to the other slave. The benefit of this configuration, however,
is that full-duplex operation can be obtained. In a point-to-multipoint environment, this is the preferred
configuration. Figure 22-11 shows the single-master configuration.
HDLC Bus
Controller
RXD
CTS
TXD
A
RCLK/TCLK
HDLC Bus
Controller
RXD
CTS
TXD
B
RCLK/TCLK
HDLC Bus
Controller
RXD
CTS
TXD
C
RCLK/TCLK
Clock
HDLC Bus LAN
+ 3.3 V
R
Master
Master
Master
NOTES:
1. Transceivers may be used to extend the LAN size.
2. The TXD pins of slave devices should be configured to open-drain in the port C parallel I/O port.
3. Clock is a common RCLK/TCLK for all stations.



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