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SN8F27E64LKB Datasheet(PDF) 83 Page - SONiX Technology Company |
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SN8F27E64LKB Datasheet(HTML) 83 Page - SONiX Technology Company |
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83 / 192 page  SN8F27E60 Series 8-Bit Flash Micro-Controller with Embedded ICE and ISP SONiX TECHNOLOGY CO., LTD Page 83 Version 1.4 7.5 PORT 4, PORT 5 ADC SHARE PIN The Port 4, Port 5 are shared with ADC input function and no Schmitt trigger structure. Only one pin of port 4, port 5 can be configured as ADC input in the same time by ADM register. The other pins of port 4, port 5 are digital I/O pins. Connect an analog signal to COMS digital input pin, especially the analog signal level is about 1/2 VDD will cause extra current leakage. In the power down mode, the above leakage current will be a big problem. Unfortunately, if users connect more than one analog input signal to port 4 or port 5 will encounter above current leakage situation. P4CON is Port4 Configuration register. P5CON is Port5 Configuration register. Write “1” into P4CON.n or P5CON.n will configure related port 4 or port 5 pin will be set as input mode and disable pull-up resistor. 0C6H Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 P4CON P4CON7 P4CON6 P4CON5 P4CON4 P4CON3 P4CON2 P4CON1 P4CON0 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W After reset 0 0 0 0 0 0 0 0 Bit [7:0] P4CON [7:0]: P4.n configuration control bits. 0 = P4.n can be a digital I/O pin. 1 = P4.n will be set as input mode and disable pull-up resistor. 0C7H Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 P5CON P5CON3 P5CON2 P5CON1 P5CON0 Read/Write R/W R/W R/W R/W After reset 0 0 0 0 Bit [3:0] P5CON [3:0]: P5.n configuration control bits. 0 = P5.n can be a digital I/O pin. 1 = P5.n will be set as input mode and disable pull-up resistor. Port 4 and Port 5 ADC analog input is controlled by GCHS and CHSn bits of ADM register. If GCHS = 0, P4.n and P5.n are general purpose bi-direction I/O port. If GCHS = 1, P4.n and P5.n pointed by CHSn is ADC analog signal input pin. 0C8H Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 ADM ADENB ADS EOC GCHS CHS3 CHS2 CHS1 CHS0 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W After reset 0 0 0 0 0 0 0 0 Bit 4 GCHS: Global channel select bit. 0 = Disable AIN channel. 1 = Enable AIN channel. Bit [3:0] CHS [3:0]: ADC input channels select bit. 0000 = AIN0, 0001 = AIN1, 0010 = AIN2, 0011 = AIN3, 0100 = AIN4, 0101 = AIN5, 0110 = AIN6, 0111 = AIN7, 1000 = AIN8, 1001 = AIN9, 1010 = AIN10, 1011 = AIN11. Note: For P4.n and P5.n general purpose I/O function, users should make sure of P4.n and P5.n ’s ADC channel are disabled, or P4.n and P5.n are automatically set as ADC analog input when GCHS = 1 and CHS[3:0] point to P4.n and P5.n. |
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