SN8F27E64LKB datasheet(47/192 Pages) SONIX

47 / 192 page

SN8F27E60 Series

8-Bit Flash Micro-Controller with Embedded ICE and ISP

SONiX TECHNOLOGY CO., LTD

Page 47

Version 1.4

The LVD (low voltage detector) is built-in Sonix 8-bit MCU to be brown out reset protection. When the VDD drops and

is below LVD detect voltage, the LVD would be triggered, and the system is reset. The LVD detect level is different by

each MCU. The LVD voltage level is a point of voltage and not easy to cover all dead-band range. Using LVD to

improve brown out reset is depend on application requirement and environment. If the power variation is very deep,

violent and trigger the LVD, the LVD can be the protection. If the power variation can touch the LVD detect level and

make system work error, the LVD can

’t be the protection and need to other reset methods. More detail LVD information

is in the electrical characteristic section.

The LVD is three levels design (1.8V/2.4V/3.3V) and controlled by LVD code option. The 1.8V LVD is always enable for

power on reset and Brown Out reset. The 2.4V LVD includes LVD reset function and flag function to indicate VDD

status function. The 3.3V includes flag function to indicate VDD status. LVD flag function can be an easy low battery

detector. LVD24, LVD33 flags indicate VDD voltage level. For low battery detect application, only checking LVD24,

LVD33 status to be battery status. This is a cheap and easy solution.

0EFH

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

STKP

GIE

LVD24

LVD33

STKPB2

STKPB1

STKPB0

Read/Write

R/W

After Reset

Bit 6

LVD24: LVD24 low voltage detect indicator.

0 = Vdd > LVD24 detect level.

1 = Vdd < LVD24 detect level.

Bit 5

LVD33: LVD33 low voltage detect indicator.

0 = Vdd > LVD33 detect level.

1 = Vdd < LVD33 detect level.

LVD

LVD Code Option

LVD_L

LVD_M

LVD_H

1.8V Reset

Available

2.4V Flag

Available

2.4V Reset

Available

3.3V Flag

Available

LVD_L

If VDD < 1.8V, system will be reset.

Disable LVD24 and LVD33 bit of PFLAG register.

LVD_M

If VDD < 1.8V, system will be reset.

Enable LVD24 bit of PFLAG register. If VDD > 2.4V, LVD24 is

“0”. If VDD <= 2.4V, LVD24 flag is “1”.

Disable LVD33 bit of PFLAG register.

LVD_H

If VDD < 2.4V, system will be reset.

Enable LVD24 bit of PFLAG register. If VDD > 2.4V, LVD24 is

“0”. If VDD <= 2.4V, LVD24 flag is “1”.

Enable LVD33 bit of PFLAG register. If VDD > 3.3V, LVD33 is

“0”. If VDD <= 3.3V, LVD33 flag is “1”.

LVD_MAX

If VDD < 3.3V, system will be reset.



Note:

After any LVD reset, LVD24, LVD33 flags are cleared.

The voltage level of LVD 2.4V or 3.3V is for design reference only. Don

’t use the LVD indicator as

precision VDD measurement.

SN8F27E64LKB Datasheet(PDF) 47 Page - SONiX Technology Company

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