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SN8F27E64LKB Datasheet(PDF) 44 Page - SONiX Technology Company

Part # SN8F27E64LKB
Description  8-Bit Flash Micro-Controller with Embedded ICE and ISP
PDF  192 Pages
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Manufacturer  SONIX [SONiX Technology Company]
Direct Link  http://www.sonix.com.tw
Logo SONIX - SONiX Technology Company

SN8F27E64LKB Datasheet(HTML) 44 Page - SONiX Technology Company

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SN8F27E60 Series
8-Bit Flash Micro-Controller with Embedded ICE and ISP
SONiX TECHNOLOGY CO., LTD
Page 44
Version 1.4
3
3
3 RESET
3.1 OVERVIEW
The system would be reset in three conditions as following.
Power on reset
Watchdog reset
Brown out reset
External reset (only supports external reset pin enable situation)
When any reset condition occurs, all system registers keep initial status, program stops and program counter is cleared.
After reset status released, the system boots up and program starts to execute from ORG 0. The POR, WDT and RST
flags indicate system reset status. The system can depend on POR, WDT and RST status and go to different paths by
program.
086H
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PFLAG
POR
WDT
RST
STKOV
-
C
DC
Z
Read/Write
R
R
R
R
-
R/W
R/W
R/W
After reset
-
-
-
-
-
0
0
0
Bit 7
POR: Power on reset and LVD brown-out reset indicator.
0 = Non-active.
1 = Reset active. LVD announces reset flag.
Bit 6
WDT: Watchdog reset indicator.
0 = Non-active.
1 = Reset active. Watchdog announces reset flag.
Bit 5
RST: External reset indicator.
0 = Non-active.
1 = Reset active. External reset announces reset flag.
Finishing any reset sequence needs some time. The system provides complete procedures to make the power on reset
successful. For different oscillator types, the reset time is different. That causes the VDD rise rate and start-up time of
different oscillator is not fixed. RC type oscillator
’s start-up time is very short, but the crystal type is longer. Under client
terminal application, users have to take care the power on reset time for the master terminal requirement. The reset
timing diagram is as following.
VDD
VSS
VDD
VSS
Watchdog Normal Run
Watchdog Stop
System Normal Run
System Stop
LVD Detect Level
External Reset
Low Detect
External Reset
High Detect
Watchdog
Overflow
Watchdog
Reset Delay
Time
External
Reset Delay
Time
Power On
Delay Time
Power
External Reset
Watchdog Reset
System Status



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