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SN8F27E64LKB Datasheet(PDF) 17 Page - SONiX Technology Company |
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SN8F27E64LKB Datasheet(HTML) 17 Page - SONiX Technology Company |
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17 / 192 page ![]() SN8F27E60 Series 8-Bit Flash Micro-Controller with Embedded ICE and ISP SONiX TECHNOLOGY CO., LTD Page 17 Version 1.4 2.1.1 RESET VECTOR (0000H) A one-word vector address area is used to execute system reset. Power On Reset (POR=1). Watchdog Reset (WDT=1). External Reset (RST=1). After power on reset, external reset or watchdog timer overflow reset, then the chip will restart the program from address 0000h and all system registers will be set as default values. It is easy to know reset status from POR, WDT, and RST flags of PFLAG register. The following example shows the way to define the reset vector in the program memory. Example: Defining Reset Vector ORG 0 ; 0000H JMP START ; Jump to user program address. … ORG 15H START: ; 0015H, The head of user program. … ; User program … ENDP ; End of program Note: The head of user program should skip interrupt vector area to avoid program execution error. |
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