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SN8F27E64LKB Datasheet(PDF) 30 Page - SONiX Technology Company |
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SN8F27E64LKB Datasheet(HTML) 30 Page - SONiX Technology Company |
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30 / 192 page ![]() SN8F27E60 Series 8-Bit Flash Micro-Controller with Embedded ICE and ISP SONiX TECHNOLOGY CO., LTD Page 30 Version 1.4 2.2.3 PROGRAM FLAG The PFLAG register contains the arithmetic status of ALU operation, system reset status and LVD detecting status. POR, WDT, and RST bits indicate system reset status including power on reset, LVD reset, reset by external pin active and watchdog reset. C, DC, Z bits indicate the result status of ALU operation. LVD24, LVD33 bits indicate LVD detecting power voltage status. 086H Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 PFLAG POR WDT RST STKOV - C DC Z Read/Write R R R R - R/W R/W R/W After Reset - - - - - 0 0 0 Bit 7 POR: Power on reset and LVD brown-out reset indicator. 0 = Non-active. 1 = Reset active. LVD announces reset flag. Bit 6 WDT: Watchdog reset indicator. 0 = Non-active. 1 = Reset active. Watchdog announces reset flag. Bit 5 RST: External reset indicator. 0 = Non-active. 1 = Reset active. External reset announces reset flag. Bit 4 STKOV: Stack overflow indicator. 0 = Non-overflow. 1 = Stack overflow. Bit 2 C: Carry flag 1 = Addition with carry, subtraction without borrowing, rotation with shifting out logic “1”, comparison result ≥ 0. 0 = Addition without carry, subtraction with borrowing signal, rotation with shifting out logic “0”, comparison result < 0. Bit 1 DC: Decimal carry flag 1 = Addition with carry from low nibble, subtraction without borrow from high nibble. 0 = Addition without carry from low nibble, subtraction with borrow from high nibble. Bit 0 Z: Zero flag 1 = The result of an arithmetic/logic/branch operation is zero. 0 = The result of an arithmetic/logic/branch operation is not zero. 0EFH Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 STKP GIE LVD24 LVD33 - - STKPB2 STKPB1 STKPB0 Read/Write R/W R R - - R/W R/W R/W After Reset 0 - - - - 1 1 1 Bit 6 LVD24: LVD24 low voltage detect indicator. 0 = Vdd > LVD24 detect level. 1 = Vdd < LVD24 detect level. Bit 5 LVD33: LVD33 low voltage detect indicator. 0 = Vdd > LVD33 detect level. 1 = Vdd < LVD33 detect level. Note: Refer to instruction set table for detailed information of C, DC and Z flags. |
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