PIC16F18323-ESLASHRFQTP datasheet(57/442 Pages) MICROCHIP

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Preliminary

DS40001799A-page 57

PIC16(L)F18313/18323

5.1

Power-On Reset (POR)

The POR circuit holds the device in Reset until VDD has

reached an acceptable level for minimum operation.

Slow rising VDD, fast operating speeds or analog

performance may require greater than minimum VDD.

The PWRT, BOR or MCLR features can be used to

extend the start-up period until all device operation

conditions have been met.

5.2

Brown-Out Reset (BOR)

The BOR circuit holds the device in Reset while VDD is

below a selectable minimum level. Between the POR

and BOR, complete voltage range coverage for execu-

tion protection can be implemented.

The Brown-out Reset module has four operating

modes controlled by the BOREN<1:0> bits in

Configuration Words. The four operating modes are:

• BOR is always on

• BOR is off when in Sleep

• BOR is controlled by software

• BOR is always off

Refer to Table 5-1 for more information.

The Brown-out Reset voltage level is selectable by

configuring the BORV bit in Configuration Words.

A VDD noise rejection filter prevents the BOR from

triggering on small events. If VDD falls below VBOR for

a duration greater than parameter TBORDC, the device

will reset. See Figure 5-2 for more information.

TABLE 5-1:

BOR OPERATING MODES

BOREN<1:0>

SBOREN

Device Mode

BOR Mode

Instruction Execution upon:

Release of POR or Wake-up from Sleep

Active

Wait for release of BOR(1) (BORRDY = 1)

Awake

Active

Wait for release of BOR (BORRDY = 1)

Sleep

Disabled

BOR ignored when asleep

Active

Waits for release of BOR (BORRDY = 1)

XDisabled

Begins immediately (BORRDY = x)

XDisabled

Note 1:

In these specific cases, “Release of POR” and “Wake-up from Sleep”, there is no delay in start-up. The BOR

ready flag, (BORRDY = 1), will be set before the CPU is ready to execute instructions because the BOR

circuit is forced on by the BOREN<1:0> bits.

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