LM5176PWPR datasheet(15/45 Pages) TI2

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LDRV2 is turned on by the clock signal in each switching cycle and turned off by the PWM comparator at the

peak of the inductor ripple current.

The low-side gate drive, LDRV1, complementary to the HDRV1 drive signal, controls the synchronous

rectification MOSFET of the buck stage. The high-side gate drive, HDRV2, complementary to the low-side gate

drive LDRV2, controls the high-side synchronous rectifier of the boost stage. For operation with VIN close to

VOUT, the LM5176 uses a proprietary buck or boost transition scheme to achieve smooth, low ripple transition

zone behavior.

Peak and valley current mode controllers require slope compensation for stable current loop operation at duty

cycle greater than 50% in peak current mode control and less than 50% in valley current mode control. The

LM5176 provides a SLOPE pin to program optimum slope for any VIN and VOUT combination using an external

capacitor.

7.3.2 VCC Regulator and Optional BIAS Input

The VCC regulator provides a regulated bias supply to the gate drivers. When EN/UVLO is above the standby

threshold (VEN(STBY)), the VCC regulator is turned on. For VIN less than the VCC regulation target, the VCC

voltage tracks VIN with a small voltage drop as shown in Figure 6-4. If the EN/UVLO input is above the operating

threshold (VEN(OP)) and VCC exceeds the VCC UV threshold (VUV(VCC)), the controller is enabled and switching

begins.

The VCC regulator draws power from VIN when there is no supply voltage connected to the BIAS pin. If the BIAS

pin is connected to an external voltage source that exceeds VCC by one diode drop, the VCC regulator draws

power from the BIAS input instead of VIN. Connecting the BIAS pin to VOUT in applications with VOUT greater

than 8.5 V improves the efficiency of the regulator in the buck mode.

For low VIN operation, ensure that the VCC voltage is sufficient to fully enhance the MOSFETs. Use an external

bias supply if VIN dips below the voltage required to sustain the VCC voltage. For these conditions, use a series

blocking diode between the input supply and the VIN pin (Figure 7-1). This prevents VCC from back-feeding into

VIN through the body diode of the VCC regulator.

A ceramic capacitor of 16 V or higher voltage rating and a value between 1 µF and 4.7 µF is required to supply

the VCC regulator load transients. The VCC bypass capacitor should be connected between VCC and PGND

pins.

Optional

Bias Supply/ VOUT

VIN

CVCC

CBIAS

VIN

BIAS

CVIN

VCC

LM5176

Series Blocking Diode

Figure 7-1. VCC Regulator and Optional BIAS

7.3.3 Enable/UVLO

The LM5176 has a dual function enable and undervoltage lockout (UVLO) circuit. The EN/UVLO pin has three

distinct voltage ranges: shutdown, standby, and operating (see Section 7.4.1). When the EN/UVLO pin is below

the standby threshold, VEN(STBY), the converter is held in a low power shutdown mode. When EN/UVLO voltage

is greater than the standby threshold, VEN(STBY), but less than the operating threshold, VEN(OP), the internal

bias rails and the VCC regulator are enabled but the soft-start (SS) pin is held low and the PWM controller is

disabled. A pullup current IEN(STBY) is sourced out of the EN/UVLO pin in standby mode to provide hysteresis

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LM5176

SNVSAI1D – JUNE 2017 – REVISED AUGUST 2021

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