LM5176PWPR datasheet(18/45 Pages) TI2

18 / 45 page

external SYNC

RT/SYNC

LM5176

SYNC

Figure 7-3. Using External SYNC

7.3.10 Frequency Dithering

The LM5176 provides an optional frequency dithering function that is enabled by connecting a capacitor from

DITH to AGND. Figure 7-4 illustrates the dithering circuit. A triangular waveform centered at 1.22 V is generated

across the CDITH capacitor. This triangular waveform modulates the oscillator frequency by 10% of the nominal

frequency set by the RT resistor. The CDITH capacitance value sets the rate of the low frequency modulation. A

lower CDITH capacitance will modulate the oscillator frequency at a faster rate than a higher capacitance. For

the dithering circuit to effectively reduce peak EMI, the modulation rate must be much less than the oscillator

frequency (Fsw). Equation 6 calculates the DITH pin capacitance required to set the modulation frequency, FMOD.

Connecting the DITH pin directly to AGND disables frequency dithering, and the internal oscillator operates at a

fixed frequency set by the RT resistor. Dither is disabled when external SYNC is used.

DITH

MOD

0.24 V

(6)

DITH

LM5176

DITH

1.22 V

1.22 V - 5 %

1.22 V + 5%

Figure 7-4. Dither Operation

7.3.11 Output Overvoltage Protection (OVP)

The LM5176 provides an output overvoltage protection (OVP) circuit that turns off the gate drives when the

feedback voltage is above the output overvoltage threshold VOVP. Switching resumes once the feedback voltage

falls below the OVP threshold. There is a small hysteresis to prevent chattering.

7.3.12 Power Good (PGOOD)

PGOOD is an open-drain output that is pulled low when the voltage at the FB pin is outside -9%/+10% of the

nominal VREF. The PGOOD internal N-Channel MOSFET pulldown strength is typically 4.2 mA. This pin can be

connected to a voltage supply of up to 8 V through a pullup resistor.

7.3.13 Gm Error Amplifier

The LM5176 has a gm error amplifier for loop compensation. The gm amplifier output (COMP) range is 0.3 V

to 3 V. Connect an Rc1-Cc1 compensation network between COMP and ground for type II (PI) compensation

(see Figure 8-1). Another pole is usually added using Cc2 to suppress higher frequency noise and switching

frequency ripple.

LM5176

SNVSAI1D – JUNE 2017 – REVISED AUGUST 2021

www.ti.com

Submit Document Feedback

Product Folder Links: LM5176

LM5176PWPR Datasheet(PDF) 18 Page - Texas Instruments

LM5176PWPR Datasheet(HTML) 18 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

Datasheet Download

Link URL