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LM5176PWPR Datasheet(PDF) 3 Page - Texas Instruments |
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LM5176PWPR Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 45 page  5 Pin Configuration and Functions VIN EN/UVLO SLOPE SS COMP FB AGND RT ISNS(+) ISNS(±) VOSNS DITH MODE VISNS 2 1 7 8 9 11 10 6 14 13 12 5 4 3 28 27 26 25 24 23 22 21 20 19 18 16 15 17 SW1 HDRV1 BOOT1 LDRV1 BIAS VCC PGND LDRV2 BOOT2 HDRV2 SW2 CS CSG PGOOD LM5176 HTSSOP-28 Figure 5-1. PWP Package 28-Pin HTSSOP With PowerPAD™ Top View 4 5 6 8 7 3 2 1 SLOPE SS COMP FB AGND RT DITH MODE 22 21 20 19 18 17 16 15 LDRV1 BIAS VCC PGND LDRV2 BOOT2 HDRV2 SW2 Figure 5-2. RHF Package 28-Pin QFN With PowerPAD Top View Table 5-1. Pin Functions PIN I/O DESCRIPTION NAME HTSSOP QFN EN/UVLO 1 26 I Enable pin. For EN/UVLO < 0.4 V, the LM5176 is in a low current shutdown mode. For EN/UVLO > 1.22 V, the PWM function is enabled, provided VCC exceeds the VCC UV threshold. VIN 2 27 I/P The input supply pin to the IC. Connect VIN to a supply voltage between 4.2 V and 55 V. VISNS 3 28 I VIN sense input. Connect to power stage input rail. MODE 4 1 I 1.38 V < MODE < 2.22 V: CCM, hiccup enabled (set RMODE resistor to AGND = 93.1 kΩ) 2.6 V < MODE < VCC: CCM, hiccup disabled (set RMODE resistor to AGND = 200 kΩ or connect to VCC) DITH 5 2 I A capacitor connected between the DITH pin and AGND is charged and discharged with a current source. As the voltage on the DITH pin ramps up and down the oscillator frequency is modulated by 10% of the nominal frequency set by the RT resistor. Grounding the DITH pin will disable the dithering feature. In the external Sync mode, the DITH pin voltage is ignored. RT/SYNC 6 3 I Switching frequency programming pin. An external resistor is connected to the RT/SYNC pin and AGND to set the switching frequency. This pin can also be used to synchronize the PWM controller to an external clock. SLOPE 7 4 I A capacitor connected between the SLOPE pin and AGND provides the slope compensation ramp for stable current mode operation in both buck and boost mode. SS 8 5 I Soft-start programming pin. A capacitor between the SS pin and AGND pin programs soft-start time. COMP 9 6 O Output of the error amplifier. An external RC network connected between COMP and AGND compensates the regulator feedback loop. AGND 10 7 G Analog ground of the IC FB 11 8 I Feedback pin for output voltage regulation. Connect a resistor divider network from the output of the converter to the FB pin. www.ti.com LM5176 SNVSAI1D – JUNE 2017 – REVISED AUGUST 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: LM5176 |
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