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STM32WBA62CGF6 Datasheet(PDF) 162 Page - STMicroelectronics

Part # STM32WBA62CGF6
Description  Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M33 with TrustZone , FPU, Bluetooth IEEE802.15.4 radio solution
PDF  185 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32WBA62CGF6 Datasheet(HTML) 162 Page - STMicroelectronics

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Electrical characteristics
STM32WBA6xxx
162/185
DS14736 Rev 1
Figure 35. SPI timing diagram - Slave mode and CPHA = 0
tv(SO)
Data output valid time
Slave mode (after enable edge)
2.7 V ≤ VDD ≤ 3.6 V,
voltage range 1
-
12.5
16.5
ns
Slave mode (after enable edge)
1.71 V ≤ VDD < 2.7 V,
voltage range 1
-
12.5
23.5
Slave mode (after enable edge)
2.7 V ≤ VDD ≤ 3.6 V,
voltage range 2
-17
20.5
Slave mode (after enable edge)
1.71 V ≤ VDD < 2.7 V,
voltage range 2
-17
27.5
tv(MO)
Master mode
-
1
2
th(SO)
Data output hold time
Slave mode
8
-
-
th(MO)
Master mode
0
-
-
1. Evaluated by characterization, not tested in production.
2. Maximum frequency in Slave transmitter mode is determined by the sum of tv(SO) and tsu(MI), which must fit into SCK low or
high phase preceding the SCK sampling edge. This value can be achieved when SPI communicates with a master having
tsu(MI) = 0 while Duty(SCK) = 50%.
3. tSCK = tspi_ker_ck x baudrate prescaler
Table 95. SPI characteristics(1) (continued)
Symbol
Parameter
Conditions
Min
Typ
3.3 V
Max
Unit
MSv41658V2
NSS input
CPHA=0
CPOL=0
CPHA=0
CPOL=1
MISO output
MOSI input
tsu(SI)
th(SI)
tw(SCKL)
tw(SCKH)
tc(SCK)
th(NSS)
tdis(SO)
tsu(NSS)
ta(SO)
tv(SO)
Next bits IN
Last bit OUT
First bit IN
First bit OUT
Next bits OUT
th(SO)
Last bit IN



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