STM32WBA62CGF6 datasheet(159/185 Pages) STMICROELECTRONICS

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DS14736 Rev 1

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STM32WBA6xxx

Electrical characteristics

169

5.3.29

USART characteristics

Unless otherwise specified, the parameters given in Table 94 are derived under the ambient

temperature, fPCLKx frequency and VDD supply voltage conditions summarized in Table 30,

with the following configuration:

•

Output speed set to OSPEEDRy[1:0] = 10

•

Capacitive load CL = 30pF

•

Measurement points are done at 0.5 VDD

•

I/O compensation cell activated

•

Voltage scaling range 1

Refer to Section 4.2 for more details on the input/output alternate function characteristics

(NSS, CK, TX, RX for USART).

Table 94. USART characteristics(1)

Symbol Parameter

Conditions

Min

Typ

3.3 V

Max

Unit

fCK

USART

clock

frequency

Master mode, 1.71 V ≤ VDD ≤ 3.6 V

12.5

MHz

Slave receiver, 1.71 V ≤ VDD ≤ 3.6 V

Slave transmitter, 2.7 V ≤ VDD ≤ 3.6 V

Slave transmitter, 1.71 V ≤ VDD < 2.7 V

22.5

tsu(NSS)

NSS setup

time

Slave mode

tker(2) + 2

th(NSS)

NSS hold

time

Slave mode

tw(CKH)

tw(CKL)

CK high and

low time

Master mode

(1/fCK) / 2 - 1

(1/fCK) / 2 (1/fCK) / 2 + 1

tsu(RX)

Data input

setup time

Master mode

Slave mode

th(RX)

Data input

hold time

Master mode

Slave mode

tv(TX)

Data output

valid time

Slave mode, 2.7 V ≤ VDD ≤ 3.6 V

15.5

Slave mode, 1.71 V ≤ VDD < 2.7 V

Master mode

th(TX)

Data output

hold time

Slave mode

Master mode

1. Evaluated by characterization, not tested in production, unless otherwise specified.

2. tker is the usart_ker_ck_pres clock period.

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