ECP2 datasheet(43/386 Pages) LATTICE

43 / 386 page

2-40

Architecture

Lattice Semiconductor

LatticeECP2/M Family Data Sheet

DQSXFER

LatticeECP2/M devices provide a DQSXFER signal to the output buffer to assist it in data transfer to DDR memo-

ries that require DQS strobe be shifted 90

o. This shifted DQS strobe is generated by the DQSDEL block. The

DQSXFER signal runs the span of the data bus.

sysI/O Buffer

Each I/O is associated with a ﬂexible buffer referred to as a sysI/O buffer. These buffers are arranged around the

periphery of the device in groups referred to as banks. The sysI/O buffers allow users to implement the wide variety

of standards that are found in today’s systems including LVCMOS, SSTL, HSTL, LVDS and LVPECL.

sysI/O Buffer Banks

LatticeECP2/M devices have nine sysI/O buffer banks: eight banks for user I/Os arranged two per side. The ninth

sysI/O buffer bank (Bank 8) is located adjacent to Bank 3 and has dedicated/shared I/Os for conﬁguration. When a

shared pin is not used for conﬁguration it is available as a user I/O. Each bank is capable of supporting multiple I/O

standards. Each sysI/O bank has its own I/O supply voltage (VCCIO). In addition, each bank, except Bank 8, has

voltage references, VREF1 and VREF2, which allow it to be completely independent from the others. Bank 8 shares

two voltage references, VREF1 and VREF2, with Bank 3. Figure 2-37 shows the nine banks and their associated sup-

plies.

In LatticeECP2/M devices, single-ended output buffers and ratioed input buffers (LVTTL, LVCMOS and PCI) are

powered using VCCIO. LVTTL, LVCMOS33, LVCMOS25 and LVCMOS12 can also be set as ﬁxed threshold inputs

independent of VCCIO.

Each bank can support up to two separate VREF voltages, VREF1 and VREF2, that set the threshold for the refer-

enced input buffers. Some dedicated I/O pins in a bank can be conﬁgured to be a reference voltage supply pin.

Each I/O is individually conﬁgurable based on the bank’s supply and reference voltages.

ECP2 Datasheet(PDF) 43 Page - Lattice Semiconductor