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ECP2 Datasheet(PDF) 26 Page - Lattice Semiconductor |
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ECP2 Datasheet(HTML) 26 Page - Lattice Semiconductor |
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26 / 386 page ![]() 2-23 Architecture Lattice Semiconductor LatticeECP2/M Family Data Sheet MULT sysDSP Element This multiplier element implements a multiply with no addition or accumulator nodes. The two operands, A and B, are multiplied and the result is available at the output. The user can enable the input/output and pipeline registers. Figure 2-23 shows the MULT sysDSP element. Figure 2-23. MULT sysDSP Element Multiplier x n m m n m n m n n m m+n m+n (default) CLK (CLK0,CLK1,CLK2,CLK3) CE (CE0,CE1,CE2,CE3) RST(RST0,RST1,RST2,RST3) Pipeline Register Input Register Multiplier Multiplicand Signed A Shift Register A In Shift Register B In Shift Register A Out Shift Register B Out Output Input Data Register A Input Data Register B To Multiplier Input Register Signed B To Multiplier |
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