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ECP2 Datasheet(PDF) 73 Page - Lattice Semiconductor |
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ECP2 Datasheet(HTML) 73 Page - Lattice Semiconductor |
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73 / 386 page  3-21 DC and Switching Characteristics Lattice Semiconductor LatticeECP2/M Family Data Sheet tSUE Clock to Data Setup - PIO Input Register LFE2-6 0.00 — 0.00 — 0.00 — ns LFE2-12 0.00 — 0.00 — 0.00 — ns LFE2-20 0.00 — 0.00 — 0.00 — ns LFE2-35 0.00 — 0.00 — 0.00 — ns LFE2-50 0.00 — 0.00 — 0.00 — ns LFE2-70 0.00 — 0.00 — 0.00 — ns LFE2M20 0.00 — 0.00 — 0.00 — ns LFE2M35 0.00 — 0.00 — 0.00 — ns LFE2M50 0.00 — 0.00 — 0.00 — ns LFE2M70 0.00 — 0.00 — 0.00 — ns LFE2M100 0.00 — 0.00 — 0.00 — ns tHE Clock to Data Hold - PIO Input Register LFE2-6 0.90 — 1.10 — 1.30 — ns LFE2-12 0.90 — 1.10 — 1.30 — ns LFE2-20 0.90 — 1.10 — 1.30 — ns LFE2-35 0.90 — 1.10 — 1.30 — ns LFE2-50 0.90 — 1.10 — 1.30 — ns LFE2-70 0.90 — 1.10 — 1.30 — ns LFE2M20 0.90 — 1.10 — 1.30 — ns LFE2M35 0.90 — 1.10 — 1.30 — ns LFE2M50 1.20 — 1.40 — 1.60 — ns LFE2M70 1.20 — 1.40 — 1.60 — ns LFE2M100 1.20 — 1.40 — 1.60 — ns tSU_DELE Clock to Data Setup - PIO Input Register with Data Input Delay LFE2-6 1.00 — 1.30 — 1.60 — ns LFE2-12 1.00 — 1.30 — 1.60 — ns LFE2-20 1.00 — 1.30 — 1.60 — ns LFE2-35 1.00 — 1.30 — 1.60 — ns LFE2-50 1.00 — 1.30 — 1.60 — ns LFE2-70 1.00 — 1.30 — 1.60 — ns LFE2M20 1.20 — 1.60 — 1.90 — ns LFE2M35 1.20 — 1.60 — 1.90 — ns LFE2M50 1.20 — 1.60 — 1.90 — ns LFE2M70 1.20 — 1.60 — 1.90 — ns LFE2M100 1.20 — 1.60 — 1.90 — ns LatticeECP2/M External Switching Characteristics 9 (Continued) Over Recommended Operating Conditions Parameter Description Device -7 -6 -5 Units Min. Max. Min. Max. Min. Max. |
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