38D2 datasheet(42/136 Pages) RENESAS

42 / 136 page

Rev.3.02

Apr 10, 2008

Page 42 of 131

REJ03B0177-0302

38D2 Group

[Transmit Buffer Register/Receive Buffer Register

(TB1, RB1/TB2, RB2)]

The transmit buffer register and the receive buffer register are

located at the same address. The transmit buffer is write-only and

the receive buffer is read-only. If a character bit length is 7 bits,

the MSB of data stored in the receive buffer is “0”.

[Serial I/O Status Register (SIO1STS, SIO2STS)]

The read-only serial I/O status register consists of seven flags

(bits 0 to 6) which indicate the operating status of the serial I/O

function and various errors.

Three of the flags (bits 4 to 6) are valid only in UART mode.

The receive buffer full flag (bit 1) is set to “0” when the receive

buffer register is read.

If there is an error, it is detected at the same time that data is

transferred from the receive shift register to the receive buffer

serial I/O status register sets all the error flags OE, PE, FE, and

SE (bit 3 to bit 6, respectively) to “0”. Writing “0” to the serial

I/O enable bit SIOE (bit 7 of the serial I/O control register) also

sets all the status flags to “0”, including the error flags.

All bits of the serial I/O status register are set to “0” at reset, but

if the transmit enable bit (bit 4) of the serial I/O control register

has been set to “1”, the transmit shift completion flag (bit 2) and

the transmit buffer empty flag (bit 0) become “1”.

[Serial I/O Control Register (SIO1CON, SIO2CON)]

The serial I/O control register consists of eight control bits for

the serial I/O function.

[UART Control Register (UART1CON, UART2CON)]

The UART control register consists of four control bits (bits 0 to

3) which are valid when asynchronous serial I/O is selected and

set the data format of the data transfer and one bit (bit 4) which is

always valid and sets the output structure of the P55/TXD1

[P32/TxD2] pin.

[Baud Rate Generator (BRG1, BRG2)]

The baud rate generator determines the baud rate for serial

transfer.

The baud rate generator divides the frequency of the count source

by 1/(n + 1), where n is the value written to the baud rate

generator.

When setting transmit enable bit of serial I/O to “1”, the serial

I/O transmit interrupt request bit is automatically set to “1”.

When not requiring the interrupt occurrence synchronous with

the transmission enabled, take the following sequence.

(1) Set the serial I/O transmit interrupt enable bit to “0”

(disabled).

(2) Set the transmit enable bit to “1”.

(3) Set the serial I/O transmit interrupt request bit to “0” after 1

or more instructions have been executed.

(4) Set the serial I/O transmit interrupt enable bit to “1”

(enabled).

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