38D2 datasheet(99/136 Pages) RENESAS

99 / 136 page

Rev.3.02

Apr 10, 2008

Page 99 of 131

REJ03B0177-0302

38D2 Group

A/D Converter Characteristics

NOTE:

1. Confirm the recommended operating condition for main clock input frequency.

Table 26 Electrical characteristics (2)

(Vcc = 1.8 to 5.5 V, VSS = 0 V, Ta =

−20 to 85°C, f(XCIN) = 32.768 kHz, output transistors in the cut-off state, A/D

converter stopped, unless otherwise noted)

Symbol

Parameter

Test conditions

Limits

Unit

Min.

Typ.

Max.

VRAM

RAM hold voltage

When clock is stopped

1.8

5.5

ICC

Power source current

Frequency/2 mode

VCC=5.0V f(XIN)=12.5MHz

6.4

f(XIN)=12.5MHz (in WIT state)

1.5

3.0

f(XIN)=4MHz

2.2

3.0

VCC=2.5V f(XIN)=4MHz

0.6

1.2

f(XIN)=4MHz (in WIT state)

0.3

0.6

f(XIN)=2MHz

0.4

0.8

Frequency/4 mode

VCC=5.0V f(XIN)=12.5MHz

3.5

f(XIN)=12.5MHz (in WIT state)

1.5

3.0

f(XIN)=4MHz

1.5

2.5

VCC=2.5V f(XIN)=8MHz

0.8

2.5

f(XIN)=8MHz (in WIT state)

0.3

0.6

f(XIN)=4MHz

0.5

1.0

Frequency/8 mode

VCC=5.0V f(XIN)=12.5MHz

2.5

5.0

f(XIN)=12.5MHz (in WIT state)

1.5

3.0

f(XIN)=4MHz

1.2

1.6

VCC=2.5V f(XIN)=8MHz

0.5

1.0

f(XIN)=8MHz (in WIT state)

0.3

0.6

f(XIN)=4MHz

0.3

0.6

Low-speed mode

VCC=5.0V f(XIN)=stop

μA

in WIT state

5.5

μA

VCC=2.5V f(XIN)=stop

7.0

μA

in WIT state

3.5

7.0

μA

On-chip oscillator mode

f(XIN), f(XCIN) = stop

VCC=5.0V

270

540

μA

VCC=2.5V

μA

VCC=2.5V (in WIT state)

μA

All oscillations stopped

(in STP state)

Ta=25

°C

0.1

1.0

μA

Ta=85

°C

μA

Current increased

at A/D converter operating

f(XIN)=12.5 MHz, VCC=5 V

in frequency/2, 4 or 8 mode

0.5

f(XIN)= stop, VCC = 5 V

in on-chip oscillator operating

0.5

f(XIN) = stop, VCC = 5 V

in low-speed mode

0.4

Table 27 A/D converter recommended operating condition

(Vcc = 2.0 to 5.5 V, VSS = 0V, Ta =

−20 to 85°C, output transistors in cut-off state, unless otherwise noted)

Symbol

Parameter

Test conditions

Limits

Unit

Min.

Typ.

Max.

VCC

Power source voltage

2.0

5.0

5.5

VIH

“H” input voltage ADKEY

0.9VCC

VCC

VIL

“L” input voltage ADKEY

00.7

× VCC−0.5

f(φAD)

AD converter clock frequency (1)

(Low-speed • on-chip oscillator mode excluded)

4.5V

< VCC ≤ 5.5V

6.25

MHz

4.0V

< VCC ≤ 4.5V

4.0

MHz

2.0V

< VCC ≤ 4.0V

VCC

MHz

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