38D2 datasheet(19/136 Pages) RENESAS

19 / 136 page

Rev.3.02

Apr 10, 2008

Page 19 of 131

REJ03B0177-0302

38D2 Group

Notes 1: For details of how to use double/triple function ports as function I/O ports, refer to the applicable sections.

2: Make sure that the input level at each pin is either 0 V or VCC during execution of the STP instruction.

When an input level is at an intermediate potential, a current will flow from VCC to VSS through the input-stage gate.

Table 8

List of I/O port function

Name

Input/Output

I/O format

Non-port function

Related SFRs

Ref. No.

P00/SEG0/(KW4)

−

P03/SEG3/(KW7)

Port P0

Input/Output,

individual bits

CMOS compatible input level

CMOS 3-state output

LCD segment

output

Key input

(key-on wakeup)

interrupt input

Segment output disable

(1)

P04/SEG4

−

P07/SEG7

(2)

P10/SEG8

−

P17/SEG15

Port P1

Input/Output,

individual bits

CMOS compatible input level

CMOS 3-state output

Segment output disable

P20/SEG16

−

P25/SEG21

Port P2

Input/Output,

individual bits

CMOS compatible input level

CMOS 3-state output

Segment output disable

P26/SEG22/VL1

P27/SEG23/VL2

LCD power

input

P30/SRDY2/(LED0)

P31/SCLK2/(LED1)

P32/TXD2/(LED2)

P33/RXD2/(LED3)

Port P3

Input/Output,

individual bits

CMOS compatible input level

CMOS 3-state output

Serial I/O2 function I/O

PULL register

Serial I/O2 control

Serial I/O2 status

UART2 control register

(3)

(4)

(5)

(6)

P34/INT2/(LED4)

External interrupt input

PULL register

Interrupt edge selection

(7)

P35/TXOUT1/(LED5)

Timer X output 1

PULL register

(8)

P36/T2OUT/CKOUT

/(LED6)

Timer 2 output

Clock output

Timer X mode register

Timer 12 mode register

Clock output control

(9)

P37/CNTR0/TXOUT2

/(LED7)

Timer X function input

Timer X output 2

PULL register

Timer X mode register

(10)

P40/OOUT0/AN0

P41/OOUT1/AN1

Port P4

Input/Output,

individual bits

CMOS compatible input level

CMOS 3-state output

Oscillation

external

output pins

PULL register

AD control register

Oscillation output

control register

(13)

P42/AN2/ADKEY

A/D conversion input

PULL register

(11)

P43/AN3

−P45/AN5

AD control register

(12)

P46/RTP0/AN6

P47/RTP1/AN7

Real time

port function

output

PULL register

AD control register

Timer Y mode register

(13)

P50/INT0

P51/INT1

Port P5

Input/Output,

individual bits

CMOS compatible input level

CMOS 3-state output

External interrupt input

PULL register

Interrupt edge selection

(7)

P52/T3OUT/PWM0

P53/T4OUT/PWM1

Timer 3 output

Timer 4 output

PWM output

PULL register

Timer 34 mode register

(9)

P54/RXD1/(KW0)

P55/TXD1/(KW1)

P56/SCLK1/(KW2)

P57/SRDY1/(KW3)

Serial I/O1

function I/O

Key input

(key-on

wakeup)

interrupt input

PULL register

Serial I/O1 control

Serial I/O1 status

UART1 control register

(14)

(15)

(16)

(17)

P60/CNTR1

Port P6

Input/Output,

individual bits

CMOS compatible input level

CMOS 3-state output

Timer Y function input

PULL register

Timer Y mode register

(7)

P61/XCIN

Sub-clock oscillation circuit

PULL register

(18)

P62/XCOUT

CPU mode register

(19)

COM0

−COM3

Common Output

LCD common output

LCD mode register

(20)

38D2 Datasheet(PDF) 19 Page - Renesas Technology Corp

38D2 Datasheet(HTML) 19 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL