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SH7616 Datasheet(PDF) 80 Page - Renesas Technology Corp |
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SH7616 Datasheet(HTML) 80 Page - Renesas Technology Corp |
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80 / 935 page  Section 2 CPU Rev. 2.00 Mar 09, 2006 page 54 of 906 REJ09B0292-0200 Addressing Mode Instruction Format Effective Addresses Calculation Equation Indirect indexed GBR addressing @(R0, GBR) The effective address is the GBR value plus the R0 GBR R0 GBR + R0 + GBR + R0 PC relative addressing with displacement @(disp:8, PC) The effective address is the PC value plus an 8-bit displacement (disp). The value of disp is zero- extended, is doubled for a word operation, and is quadrupled for a longword operation. For a longword operation, the lowest two bits of the PC value are masked PC H'FFFFFFFC + 2/4 × & (for longword) disp (zero-extended) PC + disp × 2 or PC&H'FFFFFFFC + disp × 4 Word: PC + disp × 2 Longword: PC & H'FFFFFFFC + disp × 4 |
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