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SH7616 Datasheet(PDF) 97 Page - Renesas Technology Corp |
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SH7616 Datasheet(HTML) 97 Page - Renesas Technology Corp |
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97 / 935 page ![]() Section 2 CPU Rev. 2.00 Mar 09, 2006 page 71 of 906 REJ09B0292-0200 Table 2.18 B Field ALU Operation Instructions, Multiplication Instructions Category Mnemonic 14 13 12 10 9 8 7 6 5 4 3 2 1 0 15 Dz 00 0 00 0 –16 ≤ lmm ≤ +16 – 32 ≤ lmm ≤ +32 0 1 0Se Sf Sx Sy Dg Du 00 0 00 1 01 0 0 01 1 1 01 1 0 10 0 0 00 Dz 0: (*1) 1: (*1) 2: (*1) 3: (*1) 4: (*1) 5: A1 6: (*1) 7: A0 8: X0 9: X1 A: Y0 B: Y1 C: M0 D: (*1) E: M1 F: (*1) 0 0 01 0 0 00 1 1 0 1 0 1 0 0 1 0 1 0 1 1 1 1 1 1 1 0 01 1 1 0 0 1 1 1 1 0:X0 1:X1 2:Y0 3:A1 0:X0 1:X1 2:A0 3:A1 0:X0 0:Y0 1:Y1 2:X0 3:A1 0:Y0 0:M0 1:Y0 1:Y1 1:M1 2:A0 2:M0 2:A0 3:A1 3:M1 3:A1 01 0 PSHL #lmm, Dz PSHA #lmm, Dz PMULS Se, Sf, Dg Reserved Reserved Reserved Reserved Reserved Reserved PABS Sx, Dz PRND Sx, Dz PRND Sy, Dz PABS Sy, Dz Reserved PSUBC Sx, Sy, Dz PADDC Sx, Sy, Dz PCMP Sx, Sy PSUB Sx, Sy, Du PMULS Se, Sf, Dg PADD Sx, Sy, Du PMULS Se, Sf, Dg Imm. shift Six operand parallel instruction Three operand instructions 31–27 25–16 26 10 A field 11 0 0 1 |
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