R5F2L3ACBNFP datasheet(110/848 Pages) RENESAS

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6. Voltage Detection Circuit

REJ09B0441-0010 Rev.0.10

Jul 30, 2008

Page 74 of 809

Under development Preliminary specification

Specifications in this manual are tentative and subject to change.

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,

R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group

6.5

Voltage Monitor 1 Interrupt

Table 6.4 lists the Procedure for Setting Bits Associated with Voltage Monitor 1 Interrupt. Figure 6.6 shows an

Operating Example of Voltage Monitor 1 Interrupt.

To use the voltage monitor 1 interrupt to exit stop mode, set the VW1C1 bit in the VW1C register to 1 (digital filter

disabled).

Notes:

1. When the VW1C0 bit is set to 0, steps 2, 3, and 4 can be executed simultaneously (with one

instruction).

2. When the VW1C0 bit is set to 0, steps 6 and 7 can be executed simultaneously (with one instruction).

3. When the VW1C0 bit is set to 0, steps 8 and 9 can be executed simultaneously (with one instruction).

Table 6.4

Procedure for Setting Bits Associated with Voltage Monitor 1 Interrupt

Step

When Using Digital Filter

When Using No Digital Filter

Select the voltage detection 1 detection voltage by bits VD1S3 to VD1S0 in the VD1LS register.

Set the VCA21 bit in the VCA2 register to 0 (internal reference voltage).

3 (1)

Set the VCA22 bit in the VCA2 register to 0 (VCC voltage).

4 (1)

Set the VCA26 bit in the VCA2 register to 1 (voltage detection 1 circuit enabled).

Wait for td(E-A).

Set the COMPSEL bit in the CMPA register to 1.

7 (2)

Select the interrupt type by the IRQ1SEL in the CMPA register.

Select the sampling clock of the digital filter by

bits VW1F1 to VW1F0 in the VW1C register.

Set the VW1C1 bit in the VW1C register to 1

(digital filter disabled).

9 (3)

Set the VW1C1 bit in the VW1C register to 0

(digital filter enabled).

−

Select the interrupt request timing by the VCAC1 bit in the VCAC register and

the VW1C7 bit in the VW1C register.

Set the VW1C2 bit in the VW1C register to 0.

Set the CM14 bit in the CM1 register to 0

(low-speed on-chip oscillator on)

−

Wait for 2 cycles of the sampling clock of

the digital filter

− (No wait time required)

Set the VW1C0 bit in the VW1C register to 1 (voltage monitor 1 interrupt enabled)

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