R5F2L3ACBNFP datasheet(175/848 Pages) RENESAS

175 / 848 page

REJ09B0441-0010 Rev.0.10

Jul 30, 2008

Page 139 of 809

Under development Preliminary specification

Specifications in this manual are tentative and subject to change.

9. Clock Generation Circuit

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,

R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group

9.6

CPU Clock and Peripheral Function Clock

There are a CPU clock to operate the CPU and a peripheral function clock to operate the peripheral functions.

(Refer to Figure 9.1 Clock Generation Circuit.)

9.6.1

System Clock

The system clock is the clock source for the CPU and peripheral function clocks. The XIN clock, XCIN clock,

or on-chip oscillator clock can be selected.

9.6.2

CPU Clock

The CPU clock is an operating clock for the CPU and the watchdog timer.

The system clock divided by 1 (no division), 2, 4, 8, or 16 is used as the CPU clock. The division ratio can be

selected by the CM06 bit in the CM0 register and bits CM16 and CM17 in the CM1 register.

Use the XCIN clock while the XCIN clock oscillation stabilizes.

After a reset, the low-speed on-chip oscillator clock divided by 1 (no division) is used as the CPU clock.

When the MCU enters stop mode, the CM06 bit is set to 1 (divide-by-8 mode). To enter stop mode, set the

CM35 bit in the CM3 register to 0 (settings of CM06 in CM0 register and bits CM16 and CM17 in CM1

9.6.3

Peripheral Function Clock (f1, f2, f4, f8, and f32)

The peripheral function clock is an operating clock for the peripheral functions.

The fi (i = 1, 2, 4, 8, and 32) clock is generated by the system clock divided by i. It is used for timers RA, RB,

RC, RD, RE, RG, the serial interface, the A/D converter, and the LCD waveform control circuit.

When the MCU enters wait mode after bits CM02 to CM01 in the CM0 register are set to 01, 10, or 11, the fi

clock stops.

9.6.4

fOCO

fOCO is an operating clock for the peripheral functions.

This clock runs at the same frequency as the on-chip oscillator clock and can be used as the source for timer

RA.

In wait mode, the fOCO clock does not stop.

9.6.5

fOCO40M

fOCO40M is used as the count source for timers RC, RD, and RG.

This clock is generated by the high-speed on-chip oscillator and supplied by setting the FRA00 bit to 1.

In wait mode, the fOCO40M clock does not stop.

This clock can be used with supply voltage VCC = 3.0 to 5.5 V.

9.6.6

fOCO-F

fOCO-F is used as the count source for timers RC and RD, and the A/D converter.

This clock is generated by the high-speed on-chip oscillator, divided by i (i = 2, 3, 4, 5, 6, 7, 8, or 9; division

ratio selected by the FRA2 register). It is supplied by setting the FRA00 bit to 1.

In wait mode, the fOCO-F clock does not stop.

R5F2L3ACBNFP Datasheet(PDF) 175 Page - Renesas Technology Corp

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