R5F2L3ACBNFP datasheet(177/848 Pages) RENESAS

177 / 848 page

REJ09B0441-0010 Rev.0.10

Jul 30, 2008

Page 141 of 809

Under development Preliminary specification

Specifications in this manual are tentative and subject to change.

9. Clock Generation Circuit

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,

R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group

9.7

Oscillation Stop Detection Function

The oscillation stop detection function detects the stop of the XIN clock oscillating circuit.

The oscillation stop detection function can be enabled and disabled by the OCD0 bit in the OCD register.

Table 9.2 lists the Specifications of Oscillation Stop Detection Function.

When the XIN clock is the CPU clock source and bits OCD1 to OCD0 are set to 11b, the MCU is placed in the

following states if the XIN clock stops.

• OCD2 bit in OCD register = 1 (on-chip oscillator clock selected)

• OCD3 bit in OCD register = 1 (XIN clock stops)

• CM14 bit in CM1 register = 0 (low-speed on-chip oscillator on)

• Oscillation stop detection interrupt request is generated

9.7.1

How to Use Oscillation Stop Detection Function

• The oscillation stop detection interrupt shares a vector with the voltage monitor 1 interrupt, the voltage

monitor 2 interrupt, and the watchdog timer interrupt. To use the oscillation stop detection interrupt and

watchdog timer interrupt, the interrupt source needs to be determined.

Table 9.3 lists the Determination of Interrupt Sources for Oscillation Stop Detection, Watchdog Timer,

Voltage Monitor 1, or Voltage Monitor 2 Interrupt. Figure 9.6 shows an Example of Determining Interrupt

Sources for Oscillation Stop Detection, Watchdog Timer, Voltage Monitor 1, or Voltage Monitor 2 Interrupt.

• When the XIN clock restarts after oscillation stop, switch the XIN clock to the clock source for the CPU clock

and the peripheral functions by a program.

Figure 9.5 shows the Procedure for Switching Low-Speed On-Chip Oscillator to XIN Clock.

• To enter wait mode while the oscillation stop detection function is used, set bits CM02 to CM1 to 00

(peripheral function clock does not stop in wait mode).

• Since the oscillation stop detection function is a function for cases where the XIN clock is stopped by an

external cause, set bits OCD1 to OCD0 to 00b to stop or start the XIN clock by a program (select stop mode or

change the CM05 bit).

• This function cannot be used when the XIN clock frequency is below 2 MHz. In this case, set bits OCD1 to

OCD0 to 00b.

• To use the low-speed on-chip oscillator clock as the clock source for the CPU clock and the peripheral

functions after detecting the oscillation stop, set the FRA01 bit in the FRA0 register to 0 (low-speed on-chip

oscillator selected) and then bits OCD1 to OCD0 to 11b.

To use the high-speed on-chip oscillator clock as the clock source for the CPU clock and the peripheral

functions after detecting the oscillation stop, first set the FRA00 bit to 1 (high-speed on-chip oscillator on)

and the FRA01 bit to 1 (high-speed on-chip oscillator selected). Then set bits OCD1 to OCD0 to 11b.

Table 9.2

Specifications of Oscillation Stop Detection Function

Item

Specification

Oscillation stop detection clock and frequency bandwidth f(XIN)

≥ 2 MHz

Condition for enabling the oscillation stop detection

function

Bits OCD1 to OCD0 are set to 11b.

Operation at oscillation stop detection

Oscillation stop detection interrupt generation

Table 9.3

Determination of Interrupt Sources for Oscillation Stop Detection, Watchdog Timer,

Voltage Monitor 1, or Voltage Monitor 2 Interrupt

Generated Interrupt Source

Bit Indicating Interrupt Source

Oscillation stop detection

(when (a) or (b))

(a) OCD3 bit in OCD register = 1

(b) Bits OCD1 to OCD0 in OCD register = 11b and OCD2 bit = 1

Watchdog timer

VW2C3 bit in VW2C register = 1

Voltage monitor 1

VW1C2 bit in VW1C register = 1

Voltage monitor 2

VW2C2 bit in VW2C register = 1

R5F2L3ACBNFP Datasheet(PDF) 177 Page - Renesas Technology Corp

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