R5F2L3ACBNFP datasheet(210/848 Pages) RENESAS

210 / 848 page

REJ09B0441-0010 Rev.0.10

Jul 30, 2008

Page 174 of 809

Under development Preliminary specification

Specifications in this manual are tentative and subject to change.

12. Interrupts

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,

R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group

12.2

Registers

12.2.1

Interrupt Control Register

(TREIC, S2TIC, S2RIC, KUPIC, ADIC, S0TIC, S0RIC, S1TIC, S1RIC, TRAIC,

TRBIC, U2BCNIC, VCMP1IC, VCMP2IC)

Note:

1. Only 0 can be written to the IR bit. Do not write 1 to this bit.

Rewrite the interrupt control register when an interrupt request corresponding to the register is not generated.

Refer to 12.8.5 Rewriting Interrupt Control Register.

Address 004Ah (TREIC), 004Bh (S2TIC), 004Ch (S2RIC), 004Dh (KUPIC),

004Eh (ADIC), 0051h (S0TIC), 0052h (S0RIC), 0053h (S1TIC),

0054h (S1RIC), 0056h (TRAIC), 0058h (TRBIC), 005Eh (U2BCNIC),

0072h (VCMP1IC), 0073h (VCMP2IC),

Bit

b7b6b5

b4b3b2

b1b0

Symbol

—

ILVL2

ILVL1

ILVL0

After Reset

XXX

Bit

Symbol

Bit Name

Function

R/W

ILVL0

Interrupt priority level select bit

b2 b1 b0

0 0 0: Level 0 (interrupt disabled)

0 0 1: Level 1

0 1 0: Level 2

0 1 1: Level 3

1 0 0: Level 4

1 0 1: Level 5

1 1 0: Level 6

1 1 1: Level 7

R/W

ILVL1

R/W

ILVL2

R/W

Interrupt request bit

0: No interrupt requested

1: Interrupt requested

R/W

(1)

—

Nothing is assigned. If necessary, set to 0. When read, the content is undefined.

—

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