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7540 Datasheet(PDF) 36 Page - Renesas Technology Corp

Part # 7540
Description  8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 740 SERIES
PDF  366 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7540 Datasheet(HTML) 36 Page - Renesas Technology Corp

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1-17
REJ09B0018-0200Z
Rev.2.00
Jun 21, 2004
7540 Group
HARDWARE
FUNCTIONAL DESCRIPTION
I/O Ports
[Direction registers] PiD
The I/O ports have direction registers which determine the input/
output direction of each pin. Each bit in a direction register corre-
sponds to one pin, and each pin can be set to be input or output.
When “1” is set to the bit corresponding to a pin, this pin becomes
an output port. When “0” is set to the bit, the pin becomes an in-
put port.
When data is read from a pin set to output, not the value of the pin
itself but the value of port latch is read. Pins set to input are float-
ing, and permit reading pin values.
If a pin set to input is written to, only the port latch is written to and
the pin remains floating.
[Pull-up control register] PULL
By setting the pull-up control register (address 001616), ports P0
and P3 can exert pull-up control by program. However, pins set to
output are disconnected from this control and cannot exert pull-up
control.
Note: P26/AN6, P27/AN7, P35 and P36 do not exist for the 32-pin
version.
Accordingly, the following settings are required;
• Set direction registers of ports P26 and P27 to output.
• Set direction registers of ports P35 and P36 to output.
[Port P1P3 control register] P1P3C
By setting the port P1P3 control register (address 001716), a
CMOS input level or a TTL input level can be selected for ports
P10, P12, P13, P36, and P37 by program.
Fig. 16 Structure of port P1P3 control register
Fig. 15 Structure of pull-up control register
Port P1P3 control register
(P1P3C: address 0017 16, initial value: 00 16)
b7
b0
P37/INT0 input level selection bit
0 : CMOS level
1 : TTL level
P36/INT1 input level selection bit
0 : CMOS level
1 : TTL level
P10,P12,P13 input level selection bit
0 : CMOS level
1 : TTL level
Not used
Note: Keep setting the P3 6/INT1 input level selection bit
to “0” (initial value) for 32-pin version.
Pull-up control register
(PULL: address 001616, initial value: 0016)
P00 pull-up control bit
b7
b0
0 : Pull-up Off
1 : Pull-up On
P37 pull-up control bit
P35, P36 pull-up control bit
P34 pull-up control bit
P30 – P33 pull-up control bit
P04 – P07 pull-up control bit
P02, P03 pull-up control bit
P01 pull-up control bit
Note: Pins set to output ports are disconnected from pull-up control.



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