ATA5428-PLSW datasheet(63/100 Pages) ATMEL

63 / 100 page

4841D–WIRE–10/07

ATA5423/ATA5425/ATA5428/ATA5429

Figure 9-11. TX Operation (T_MODE = 0)

Write TX/RX Data Buffer (max. 16 - number of bytes still

in the TX/RX Data Buffer)

Write TX/RX Data Buffer (max. 16 byte)

Baud1, BAUD0:

Lim_max0 to Lim_max5:

Select baud rate range

Don't care

Write Control Register 6

Lim_min0 to Lim_min5:

Bit_ck0, Bit_ck1:

Select the baud rate

Don't care

Write Control Register 5

Set IDLE

OPM1, OPM0:

Write Control Register 1

Pin IRQ = 1 ?

Idle Mode

TX Mode

Start-up

Mode (TX)

Idle Mode

Command: Delete_IRQ

TX more Data

Bytes ?

FR7, FR8:

VSOUT_EN:

CLK_ON:

Adjust fRF

Set VSOUT_EN = 1

Don't care

Write Control Register 3

FR0 to FR6:

P_mode:

Adjust fRF

Enable or disable the

Manchester modulator

Write Control Register 2

IR1, IR0:

AVCC_EN:

FS:

OPM1, OPM0:

T_mode:

Select an event which activates

an interrupt

Don't care

Select operation frequency

Set OPM1 = 0 and OPM0 = 1

Set T_mode = 0

Write Control Register 1

XLim:

ASK/_NFSK:

Sleep0 to Sleep4:

XSleep:

Select the bit rate

Select modulation

Don't care

Write Control Register 4

Pin IRQ = 1 ?

TStartup = 331.5 × TDCLK

ATA5428-PLSW Datasheet(PDF) 63 Page - ATMEL Corporation

ATA5428-PLSW Datasheet(HTML) 63 Page - ATMEL Corporation

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